Selection Register Rising Edge
Tables 13-32 and 13-33 give an overview of the selection register for interrupt
generation at a rising edge of a digital input.
Table 13-32
Offset
Address
5
Table 13-33
Bit
0
2
Interrupt generation at rising edge of the
digital input channel 0
:
:
7
2
Interrupt generation at rising edge of the
digital input channel 7
Selection Register Falling Edge
Tables 13-34 and 13-35 give an overview of the selection register for interrupt
generation at a falling edge of a digital input.
Table 13-34
Offset Address
6
Table 13-35
Bit
0
2
Interrupt generation at falling edge of the digital
input channel 0
:
:
7
2
Interrupt generation at falling edge of the digital
input channel 7
S7-400, M7-400 Programmable Controllers Module Specifications
A5E00069467-07
Offset Address for the Selection Register Rising Edge (IF 961-DIO)
Function
Selection register rising edge
Meaning of the Bits in the Selection Register Rising Edge (IF 961-DIO)
Function
Offset Address for the Selection Register Falling Edge (IF 961-DIO)
Function
Selection register falling edge
Meaning of the Bits in the Selection Register Falling Edge (IF 961-DIO)
Function
Interface Submodules
Remarks
Read/write
= 0
Disabled
:
Disabled
Remarks
Read/write
= 0
Disabled
:
Disabled
= 1
Enabled
:
Enabled
= 1
Enabled
:
Enabled
13-29