Measurement Computing PCI-DIO48H User Manual page 8

PCI-DIO48H User's Guide
PCI-DIO48H functions are illustrated in the block diagram shown here.
SECONDPORTA(7:0)
SECONDPORTB(7:0)
SECONDPORTCH(3:0)
SECONDPORTCL(3:0)
FIRSTPORTA(7:0)
FIRSTPORTB(7:0)
FIRSTPORTCH(3:0)
FIRSTPORTCL(3:0)
HIGH DRIVE
SECONDPORT
SECONDPORTA
SECONDPORTB
SECONDPORTCH
SECONDPORTCL
HIGH DRIVE
FIRSTPORT
FIRSTPORTA
FIRSTPORTB
FIRSTPORTCH
FIRSTPORTCL
Figure 1-1. PCI-DIO48H block diagram
1-2
Controller FPGA and Logic
Control
Control
Bus
Registers
Decode/Status
Bus
Timing
LOCAL BUS
Boot
EEPROM
PCI
Controller
PCI BUS (5V, 32-BIT, 33MHZ)
Introducing the PCI-DIO48H
BADR2