Table 6.33
Back-to-Back Read
Symbol
Parameter
t
Shared signal input setup time
1
t
Shared signal input hold time
2
t
CLK to shared signal output valid
3
t
Side signal input setup time
4
t
Side signal input hold time
5
t
CLK to side signal output valid
6
t
CLK high to MASTER/ low
9
t
CLK high to MASTER/ high
10
1. See note on page 6-16 regarding 3.3 V PCI Timing Changes.
6-32
1
Electrical Characteristics
Min
Max
7
–
0
–
–
11
10
–
0
–
–
12
–
20
–
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns