Figure 5.4
Read/Write Instruction Register
DCMD Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Operator 2
Opcode Bit 0
Opcode Bit 1
Opcode Bit 2
1 - Instruction Type - R/W
0 - Instruction Type - R/W
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
A2
A3
A4
A5
A6
use data8/SFBR
Operator 0
Operator 1
DSPS Register
Read/Write Instructions
DBC Register
Immediate Data
A0
A1
Register
Address
Reserved (must be 0)
5-23