Back-To-Back Read, 32-Bit Address And Data - LSI LSI53C1510 Technical Manual

I2o-ready pci raid ultra2 scsi controller
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3.75 pc
10.25 pc
Table 7.24
Symbol
t
1
t
2
t
3
t
4
t
5
t
6
44.25 pc
7-24
11.25 pc

Back-to-Back Read, 32-Bit Address and Data

Parameter
Shared signal input setup time
Shared signal input hold time
CLK to shared signal output valid
Side signal input setup time
Side signal input hold time
CLK to side signal output valid
Specifications
34.5 pc
Min
7
0
2
10
0
Max
Unit
ns
ns
11
ns
ns
ns
12
ns
38.25 pc
4.333 pc
48.583 p
52.5 pc

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