GE PACSystems RX7i Cpu Programmer's Reference Manual page 86

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Memory Required for Bit Sequencer
Each bit sequencer uses a three-word array of control block information. The control block can be a
symbolic variable or it can be located in %R, %W, %L, or %P memory:
Note: Do not write to the control block memory registers from other functions.
Word 3 (the control word) stores the state of the Boolean inputs and outputs of its associated
function in the following format:
15
14
13
12
11
Notes:
Bits 0 through 13 are not used.
In the N operand, bits are entered as 1 through 16, not 0 through 15.
Operands for Bit Sequencer
Do not write to the Control Block memory with other instructions.
Overlapping references may cause erratic operation of BIT_SEQ.
Parameter Description
Address
Beginning address of the Control Block, which is a three-word
(????)
array:
Word 1: current step number
Word 2: length of sequence in bits
Word 3: control word, which tracks the status of the last enabling
power flow and the status of the power flow to the right.
Length (??) The number of bits in the bit sequencer, ST, that BIT_SEQ will
step through. 1  Length  256.
R
When R is energized, the step number of BIT_SEQ is set to the
value in N (default = 1), and the bit sequencer, ST, is filled with
zeroes, except for the current step number bit.
DIR
(Direction) When DIR is energized, the step number of BIT_SEQ is
incremented prior to the shift. Otherwise, it is decremented.
GFK-2950C
Word 1
current step number
Word 2
length of sequence (in bits)
Word 3
control word
10
9
8
Reserved
OK (status input
EN (enable input
February 2018
Chapter 4. Ladder Diagram (LD) Programming
7
6
5
4
3
2
Warning
1
0
Reserved
Allowed Operands Optional
Symbolic variables,
No
variables located in
%R, %W, %P, or %L
Constants
No
Flow
No
Flow
No
71

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