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Chapter 3. Program Data
Reference System
Variable
%SA0029
#SFT_IOC
%SA0030
#PNIO_ALARM A PROFINET alarm has been received and an I/O fault has been logged in group 28.
%SA0031
#SFT_SIO
%SA0032
#SBUS_ER
%SA0081 –
%SA0112
%SB0001
#WIND_ER
%SB0009
#NO_PROG
%SB0010
#BAD_RAM
%SB0011
#BAD_PWD
%SB0012
#NUL_CFG
%SB0013
#SFT_CPU
%SB0014
#STOR_ER
%SB0016
#MAX_IOC
%SB0017
#SBUS_FL
%SC0009
#ANY_FLT
%SC0010
#SY_FLT
%SC0011
#IO_FLT
%SC0012
#SY_PRES
%SC0013
#IO_PRES
%SC0014
#HRD_FLT
%SC0015
#SFT_FLT
48
PACSystems* RX7i, RX3i and RSTi-EP CPU Programmer's Reference Manual
Definition
Set when there is a software failure in the I/O Controller.
To clear this bit, clear the I/O Fault Table or power cycle the CPU.
To clear this bit, clear the I/O Fault Table or power cycle the CPU.
Set when an option module detects an internal software error.
To clear this bit, clear the I/O Fault Table or power cycle the CPU.
Set when a bus error occurs on the VME bus backplane
To clear this bit, clear the I/O Fault Table or power cycle the CPU.
Set when a user-defined fault is logged in the CPU fault table.
To clear these bits, clear the CPU fault table or power cycle the CPU. For more
information, see discussion of SVC_REQ 21: User-Defined Fault Logging in Chapter
7.
Set when there is not enough time to start the Programmer Window in Constant
Sweep mode.
To clear this bit, clear the CPU fault table or power cycle the CPU.
Set when the CPU powers up with memory preserved, but no user program is
present. Cleared when the CPU powers up with a program present or by clearing
the CPU fault table.
Set when the CPU detects corrupted RAM memory at power-up. Cleared when the
CPU detects that RAM memory is valid at power-up or by clearing the CPU fault
table.
Set when a password access violation occurs. Cleared when
the CPU fault table is cleared or when the CPU is power cycled.
Set when an attempt is made to put the CPU in RUN Mode when there is no
configuration data present.
To clear this bit, clear the CPU fault table or power cycle the CPU.
Set when the CPU detects an error in the CPU operating system software.
To clear this bit, clear the CPU fault table or power cycle the CPU.
Set when an error occurs during a programmer store operation.
To clear this bit, clear the CPU fault table or power cycle the CPU.
Set when more than 32 IOCs are configured for the system.
To clear this bit, clear the CPU fault table or power cycle the CPU.
Set when the CPU fails to gain access to the bus.
To clear this bit, clear the CPU fault table or power cycle the CPU.
Set when any fault occurs that causes an entry to be placed in the CPU or I/O Fault
Table. Cleared when both fault tables are cleared or when the CPU is power cycled.
Set when any fault occurs that causes an entry to be placed in the CPU fault table.
Cleared when the CPU fault table is cleared or when the CPU is power cycled.
Set when any fault occurs that causes an entry to be placed in the I/O Fault Table.
Cleared when the I/O Fault Table is cleared or when the CPU is power cycled.
Set as long as there is at least one entry in the CPU fault table. Cleared when the
CPU fault table is cleared.
Set as long as there is at least one entry in the I/O Fault Table. Cleared when the
I/O Fault Table is cleared.
Set when a hardware fault occurs. Cleared when both fault tables are cleared or
when the CPU is power cycled.
Set when a software fault occurs. Cleared when both fault tables are cleared or
when the CPU is power cycled.
GFK-2950C
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