Memory Control - Xilinx Kintex UltraScale KCU1500 User Manual

Memory Control

The Kintex UltraScale KCU1500 Acceleration development board uses four channels of
DDR4-2400 SDRAM at 4GB per channel for a total of 16GB. One instance of UltraScale
Memory IP (herein referred to as DDR4 IP) per channel is used as the memory controller for
that channel.
The DDR4 IP instances are customized to target the MT40A512M16HA-083E components
on the Kintex UltraScale KCU1500 Acceleration development board, with a 512-bit data
width, 32-bit address width AXI memory-mapped interface providing high-bandwidth
platform fabric access to the full 4GB per channel.
As described in
memory and the user kernels have access to the user-defined range. The DDR4 IP
Customization GUI with populated Basic tab values is shown in the following figure.
Three of the four DDR4 IP instances are identical and enable ECC. One DDR4 channel does not
Note:
support ECC.
X-Ref Target - Figure 3-6
Kintex UltraScale KCU1500 Acceleration Development Board
UG1234 (v2017.1) June 20, 2017
Sparse Memory Connectivity in Chapter
Figure 3-6: DDR4 IP Customization - Basic Tab
www.xilinx.com
Chapter 3: Hardware Platform
2, the host has access to all global
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