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Sample Program - Renesas REJ06B0734-0100 Application Note

Data transfer to on-chip peripheral modules with dmac

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3.

Sample Program

1. Sample Program Listing "main.c" (1)
1 /*""FILE COMMENT""**************************************************************
2 *
3 *
System Name : SH7203 Sample Program
4 *
File Name
: main.c
5 *
Contents
: Data transfer to on-chip peripheral modules with DMAC
6 *
Version
: 1.00.00
7 *
Model
: M3A-HS30
8 *
CPU
: SH7203
9 *
Compiler
: SHC9.1.1.0
10 *
note
: Sample program for transferring data from the SCIF by DMAC1
11 *
12 *
13 *
14 *
15 *
16 *
17 *
18 *
The information described here may contain technical inaccuracies or
19 *
typographical errors. Renesas Technology Corporation and Renesas Solutions
20 *
assume no responsibility for any damage, liability, or other loss rising
21 *
from these inaccuracies or errors.
22 *
23 *
Copyright(C) 2007 Renesas Technology Corp. All Rights Reserved
24 *
AND Renesas Solutions Corp. All Rights Reserved
25 *
26 *
history
: 2007.12.27 ver.1.00.00
27 *""FILE COMMENT END""*********************************************************/
28 #include <string.h>
29 #include "iodefine.h"
30
31 /* ==== Macro declaration ==== */
32 /* ====
DMAC Settings
33 #define DMA_SIZE_BYTE
34 #define DMA_SIZE_WORD
35 #define DMA_SIZE_LONG
36 #define DMA_SIZE_LONGx4
37 #define DMA_INT_DISABLE
38 #define DMA_INT_ENABLE
39 #define DMA_INT
40
41 /* ==== Prototype declaration ==== */
42 void main(void);
43 void io_init_dma1(void *src, void *dst, size_t size, unsigned int mode);
44 void io_dma1_stop(void);
45 void io_init_scif0(int);
46
47 /* ==== Type declaration ==== */
48 /* SCIF baud rate setting */
49 typedef struct
{
50
unsigned char scbrr;
51
unsigned short scsmr;
52 } SH7203_BAUD_SET;
53
REJ06B0734-0101/Rev.1.01
Data Transfer to On-chip Peripheral Modules with DMAC
<CAUTION>
This sample program is for reference
and its operation is not guaranteed.
Customers should use this sample program for technical reference
in software development.
/* iodefine.h is automatically created by HEW */
==== */
0x0000u
0x0001u
0x0002u
0x0003u
0x0000u
0x0010u
(DMA_INT_ENABLE >> 4u)
December 2008
SH7263/SH7203 Group
Page 9 of 17

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