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6. Sample Program Listing "main.c" (7)
272
* Function
: Initializes SCIF0
273 *
: Asynchronous (UART)/ 8 bits/ No parity/ 1 stop bit/ RTS/CTS disabled
274 *
: Baud rate is specified by argument bps
275 *
:
276 *-----------------------------------------------------------------------
277 * Argument : int bps : Value for baud rate specification
278 *-----------------------------------------------------------------------
279 * Return Value: void
280 *-----------------------------------------------------------------------
281 * Notice
: The baud rate setting values given in this program are those when
282 *
: the peripheral module clock (Pf) frequency is 33 MHz. If a different
283 *
: clock is used, the baud rate setting values must be changed.
284 *""FUNC COMMENT END""***************************************************/
285 void io_init_scif0(int bps)
286 {
287
/* ====Power-down mode cancellation==== */
288
/* ----Setting standby control register 4 (STBCR4)---- */
289
CPG.STBCR4.BIT.MSTP47 = 0;
290
291
/* ====SCIF0 initialization==== */
292
/* ----Setting serial control register (SCSCRi)---- */
293
SCIF0.SCSCR.WORD = 0x0000;
294
295
/* ----Setting FIFO control register (SCFCRi)---- */
296
SCIF0.SCFCR.BIT.TFRST = 1;
297
298
/* ----Setting serial control register (SCSCRi)---- */
299
SCIF0.SCSCR.BIT.CKE = 0x0;
300
301
/* ----Setting serial mode register (SCSMRi)---- */
302
SCIF0.SCSMR.WORD = scif_baud[bps].scsmr;
303
304
305
306
307
308
309
310
/* ----Setting bit rate register (SCBRRi)---- */
311
SCIF0.SCBRR.BYTE = scif_baud[bps].scbrr;
312
313
/* ----Setting FIFO control register (SCFCRi)---- */
314
SCIF0.SCFCR.WORD = 0x0030;
315
316
317
318
319
319
/* ====Setting pin function controller (PFC)==== */
320
PORT.PECRL1.BIT.PE1MD = 0x3;
321
322
/* ----Setting serial control register (SCSCRi)
323
SCIF0.SCSCR.BIT.TIE = 1;
324
SCIF0.SCSCR.BIT.TE = 1;
325
326 }
327 /* End of File */
REJ06B0734-0101/Rev.1.01
Data Transfer to On-chip Peripheral Modules with DMAC
/* Start clock supply to SCIF0 */
/* Stop transmission/reception by SCIF0
/* Reset transmit FIFO */
/* B'00: Internal clock */
/*
Communication mode 0: Asynchronous mode
/*
Character length
/*
Parity enable
/*
Parity mode
/*
Stop bit length
/*
Clock select
/* Transmit FIFO data count trigger
/* Modem control enable
/* Transmit FIFO data register reset
/* Loopback test
/* Switch to TxD0 pin */
/* Enable SCIF0 transmit interrupt */
/* Enable SCIF0 transmission
December 2008
SH7263/SH7203 Group
0: 8-bit data
0: Disable addition and check */
0: Even parity
0: 1 stop bit
: Table value
: Number of data bytes = 0 */
: Disabled */
: Disabled */
: Disabled */
---- */
*/
*/
*/
*/
*/
*/
*/
Page 14 of 17
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