Evaluation Board Hardware; Device Description; Hardware Link Options - Analog Devices EVAL-AD7492SDZ User Manual

UG-371

EVALUATION BOARD HARDWARE

DEVICE DESCRIPTION

The AD7492 is a 12-bit high speed, low power, successive
approximation ADC. The part operates from a single 2.7 V to
5.25 V power supply and features a maximum throughput rate
of 1 MSPS. It contains a low noise, wide bandwidth track-and-
hold amplifier that can handle bandwidths up to 10 MHz.
The conversion process and data acquisition are controlled using
standard control inputs allowing for easy interface to micro-
processors or DSPs. The input signal is sampled on the falling
edge of CONVST , and conversion is also initiated at this point.
The BUSY pin goes high at the start of conversion and goes low
880 ns later to indicate that the conversion is complete. There
are no pipeline delays associated with the part. The conversion
result is accessed via the standard CS and RD signals over a high
speed parallel interface.
The AD7492 uses advanced design techniques to achieve very
low power dissipation at high throughput rates. The part offers
flexible power/throughput rate management. It is also possible
Table 1. Link Options
Link
No. Function
LK1 This link determines the value of V
When in Position A, V
When in Position B, V
When in Position C, V
LK2 This link option selects the source of the CONVST input. When this link is in Position A, the CONVST input is provided by the SK2
external socket. When this link is in Position B, the CONVST input is provided by the
LK3 This link option determines whether the REF OUT signal from the
reference (Position B) is connected to the positive input of U4.
LK6 This link option selects the source of the RD input. When this link is in Position A, the RD input is provided by the
board. When this link is in Position B, it is tied to ground.
LK8 This link option selects the source of the CS signal. When this link is in Position A, the CS signal is provided by the EVAL-SDP-CB1Z.
When this link is in Position B, it is tied to ground.
LK9 When inserted, the buffered REF OUT voltage is divided by a factor of 3 and used as the bias input for U6.
LK10 In Position A, the biased up output of U6 is applied to the VIN pin of the AD7492. In Position B, the buffered unipolar signal input
that is applied to SK1 is connected to the V
LK14 This link option selects the sleep mode that the
sleep when low power operation is selected. When this link is in Position B, the part goes into partial sleep when low power
operation is selected.
LK15 When inserted, the unipolar V
LK20 This link option selects the voltage applied to the positive input of U6.
When in Position A, an external offset can be applied via the EXT_OFFSET SMB connector.
When in Position B, it is tied to ground.
When in Position C, it is a buffered reference voltage.
LK701 This link option selects the source of the AV
signal externally connected via J703 is selected.
LK801 This link option selects the source of the VSS_−5V signal. In Position A, the VSS_−5V signal generated on-board is selected. In
Position B, the external VSS signal is connected to J800-1.
LK802 This link option selects the source of the + VDD_+5V signal. In Position A, the VDD_+5V signal generated on-board is selected. In
Position B, the external VDD signal connected to J800-3 is selected.
.
DRIVE
is tied to AV .
DRIVE DD
is supplied externally via the J3 connector.
DRIVE
is set to 3.3 V.
DRIVE
pin of the AD7492.
IN
AD7492
impedance matching resistor is connected into the circuit.
IN
signal. In Position A, the 5 V signal generated on-board is selected. In Position B, the
DD
to operate the part in full sleep mode and partial sleep mode,
where the part wakes up to do a conversion and automatically
enters a sleep mode at the end of conversion. The type of sleep
mode is hardware selected by the PS/ FS pin. Using these sleep
modes allows very low power dissipation numbers at lower
throughput rates.
The analog input range for the part is 0 V to the reference
voltage. The 2.5 V reference is supplied internally and is
available for external referencing.

HARDWARE LINK OPTIONS

Before using the evaluation board, 13 link options must be set for
the required operating setup. Table 1 outlines the function of
these options. Table 1 shows the position in which all the links
are set when the evaluation board is packaged. Jumper and solder
link (LKx) options must be set correctly to select the appropriate
operating setup before using the evaluation board. The default
link positions are shown in Table 2, and the functions of these
options are outlined in Table 1
AD7492 (Position A) or the voltage generated by the
can be put into. Then, this link is in Position A, and the part goes into full
Rev. 0 | Page 4 of 24
EVAL-AD7492SDZ User Guide
EVAL-SDP-CB1Z board.
ADR431
EVAL-SDP-CB1Z