Loop-Back; Figure 24 Pciebiserialdb37Ba22 Loop-Back Wiring Diagram - Dynamic Engineering PCIeBiSerialDb37-BA22 User Manual

Loop-back

The Engineering kit includes reference software, utilizing external loop-back tests.
The test set-up included PcieBiSerialDb37BA22 and loop-back plug. The Pin numbers
are for the interconnections on the Loop-back plug. The IO names can be used to
accommodate a different set-up. The loop-back plug is a DB37 connector with the
interconnections protected with a connector shell. Twisted Pair wiring is used. For
short cables Cat5e can be used.
Signal
TxPSync+
TxPSync-
TxPDataU+
TxPDataU-
TxPDataL+
TxPDataL-
TxPClk+
TxPClk-

Figure 24 PcieBiSerialDb37BA22 Loop-Back wiring diagram

From To
1 5
2 6
20 24
21 25
3 7
4 8
22 26
23 27
Embedded Solutions
Signal
RxPSync+
RxPSync-
RxPDataU+
RxPDataU-
RxPDataL+
RxPDataL-
RxPClk+
RxPClk-
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