Address Map; Base Address Map; Figure 4 Pciebiserialdb37Ba22 Internal Address Map Base Functions - Dynamic Engineering PCIeBiSerialDb37-BA22 User Manual

Address Map

Base Address Map

Function
// PCIeBiSerialDb37BA22 BASE definitions
#define BA22_BASE_BASE
#define BA22_BASE_USER_SWITCH
#define BA22_BASE_XILINX_REV
#define BA22_BASE_XILINX_DES
#define BA22_BASE_STATUS
#define BA22_BASE_PLL_WRITE
#define BA22_BASE_PLL_READ

Figure 4 PCIeBiSerialDb37BA22 Internal Address Map Base Functions

The address map provided is for the local decoding performed within
PcieBiserialDb37BA22. The addresses are all offsets from a base address.
Engineering prefers a long-word oriented approach because it is more consistent across
platforms.
The map is presented with the #define style to allow cutting and pasting into many
compilers "include" files.
The host system will search the PCI bus to find the assets installed during power-on
initialization. The VendorId = 0xDCBA and the CardId = 0x0052 for the
PcieBiSerialDb37BA22.
The BA22 design has 1 channel implemented at this time. The BASE contains the
common elements of the design, while the Channels have the IO specific interfaces.
The BASE starts at the card offset. Channel 0 starts at register 20
Section Register Address Range
(starting Hex address)
Base 0-19 (0x0000)
Channel 0 20-39 (0x0050)
Offset
0x0000 // 0 BA22Base Base control register
0x0004 // 1 BA22Base User DIP switch read
0x0004 // 1 BA22Base Xilinx revision read port
0x0004 // 1 BA22Base Xilinx design read port
0x0008 // 2 BA22Base status Register offset
0x0000 // 4 BA22Base PLL FIFO write port
0x0000 // 4 BA22Base PLL FIFO read port
COM name
PLL, Switch, Status
BA22 Transmitter & Receiver
Embedded Solutions
Dynamic
Page 14