Digital Audio Interface, Input (J12); J12 Pin Description - Texas Instruments TAS3108EVM2 User Manual

Evaluation module for the tas3108 digital audio signal processor
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3.2

Digital Audio Interface, Input (J12)

The digital audio interface contains digital audio signal data (I2S), clocks, etc. See the TAS3108 data
manual for signal timing and details not covered in this document.
PIN
NET-NAME AT
NUMBER
SCHEMATICS
1
GND
2
MCLK
3
GND
4
SDIN1
5
SDIN2
6
SDIN3
7
SDIN4
8
9
10
GND
11
SCLK
12
GND
13
LRCLK
14
GND
15
16
GND
SLEU065A – SEPTEMBER 2005 – Revised NOVEMBER 2006
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Table 3-2. J12 Pin Description
Ground
Master clock input
Ground
I2S data 1, Channel 1 and 2
I2S data 2, Channel 3 and 4
I2S data 3, Channel 5 and 6
I2S data 4, Channel 7 and 8
Reserved
Reserved
Ground
I2S bit clock
Ground
I2S left-right clock
Ground
Reserved
Ground

Digital Audio Interface, Input (J12)

DESCRIPTION
System Interfaces
19

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