Aaeon GENE-8310 Manual page 52

Intel celeron m processor subcompact board 18/24-bit dual-channel lvds ethernet, 2 channel audio & mini pci
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S u b C o m p a c t B o a r d
MOV DX,WORD PTR CS:[Cfg_Port+06h]
IN AL,DX
RET
Read_Configuration_Data ENDP
Write_Configuration_Data PROC NEAR
MOV DX,WORD PTR CS:[Cfg_Port+04h]
OUT DX,AL
XCHG AL,AH
MOV DX,WORD PTR CS:[Cfg_Port+06h]
OUT DX,AL
RET
Write_Configuration_Data ENDP
Superio_Set_Reg proc near
push ax
MOV DX,WORD PTR CS:[Cfg_Port+04h]
mov al,cl
out dx,al
pop ax
inc dx
out dx,al
ret
Superio_Set_Reg endp.Set_Logic_Device proc near
G E N E - 8 3 1 0
Appendix A Programming the Watchdog Timer
A-9

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