Aaeon GENE-8310 Manual page 51

Intel celeron m processor subcompact board 18/24-bit dual-channel lvds ethernet, 2 channel audio & mini pci
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S u b C o m p a c t B o a r d
RET
Exit_Configuration_Mode ENDP
Check_Chip PROC NEAR
MOV AL,20h
CALL Read_Configuration_Data
CMP AL,87h
JNE Not_Initial
MOV AL,21h
CALL Read_Configuration_Data
CMP AL,12h
JNE Not_Initial
Need_Initial:
STC
RET
Not_Initial:
CLC
RET
Check_Chip ENDP
Read_Configuration_Data PROC NEAR
MOV DX,WORD PTR CS:[Cfg_Port+04h]
OUT DX,AL
Appendix A Programming the Watchdog Timer
G E N E - 8 3 1 0
A-8

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