Keysight N5221A Service Manual page 151

PNA Series Microwave Network Analyzers
N5221A/22A
• A12 SPAM Board (Digital Description)
• A17 CPU Board (including rear-panel interconnects)
• A51 Solid State Drive
A12 SPAM Board (Digital Description)
The A12 SPAM board contains digital and analog circuitry. For analog descriptions, refer to
Board (Analog Description)" on page
The digital signal processor (DSP) receives digitized data from the digital circuitry of the A12 SPAM board. It
computes discrete Fourier transforms to extract the complex phase and magnitude data from the analog IF
signal. The resulting raw data is written into the main random access memory (RAM). The data taking
sequence is triggered either externally from the rear panel or by firmware on the A17 CPU board.
A17 CPU Board
The A17 CPU board contains the circuitry to control the operation of the analyzer. Some of the components
include the central processing unit (CPU), memory (EEPROM, ROM, RAM), bus lines to other board
assemblies, and connections to the rear panel. Some of the main components are described next:
• CPU
• Main RAM
• Rear Panel Interconnects
CPU The central processing unit (CPU) is a microprocessor that maintains digital control over the entire
instrument through the instrument bus. The CPU receives external control information from the keypad, any
USB device, LAN or GPIB, and performs processing and formatting operations on the raw data in the main
RAM. It controls the DSP, the video processor, and the interconnect port interfaces. In addition, when the
analyzer is in the system controller mode, the CPU controls peripheral devices through the peripheral port
interfaces.
Front panel settings are stored in SRAM, with a battery providing at least five years of backup storage when
external power is off.
Main RAM The main random access memory (RAM) is shared memory for the CPU and the DSP. It stores
the raw data received from the DSP while additional calculations are performed on it by the CPU. The CPU
reads the resulting formatted data from the main RAM, converts it to a user-definable display format, and
writes this to the video processor for display.
Service Guide N5222-90001
Digital Processing and Digital Control Group Operation
5-23.
Theory of Operation
"A12 SPAM
5-29