A19 Test Set Motherboard - Keysight N5221A Service Manual

PNA Series Microwave Network Analyzers
N5221A/22A

A19 Test Set Motherboard

The A19 test set motherboard serves these functions:
• to act as an interface between the A17 CPU board and the auxiliary rear panel interconnects.
• to provide ALC signals to the A21 HMA26.5.
• to route control signals to the signal separation group. Refer to
page 5-15 for more information.
Rear Panel Interconnects
The A19 test set motherboard includes the following rear panel interconnects.
TEST SET I/O
HANDLER I/O
PWR I/O
Service Guide N5222-90001
A DB-25 female connector that is used to control external test sets. The external test set
bus consists of 13 multiplexed address and data lines, three control lines, and an
open-collector interrupt line. Pin assignments are listed in
Up to 16 test sets may be "daisy-chained" on the bus at one time.
The Test Set I/O is not compatible with 8753 network analyzer test sets.
A rectangular 36-pin, female connector providing four independent parallel input/output
ports, nine control signal lines, one ground, and a power supply line. This connector has
Type 2 output pin assignments as listed in
All signals are TTL-compatible. Data input/output ports consist of two 8-bit output ports
(Port A and Port B) and two 4-bit bidirectional ports (Port C and Port D).
Connector settings can be changed using SCPI and COM commands. The settings are not
accessible from the front panel.
A DB-9 female connector. Pin assignments are listed in
Synthesized Source Group Operation
"Signal Separation Group Operation" on
Table 5-2 on page
Table 5-3 on page 5-13.
Table 5-4 on page
Theory of Operation
5-12.
5-14.
5-11