Power Control Procedure - Epson S1C63666 Technical Manual

CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Power Control)
Voltage halver
The voltage halver generates V
voltage to drive the low-speed operation voltage regulator and LCD system voltage circuit reduces
current consumption during HALT or low-speed operation. This status is the halver mode and the
VDC2 register is used to set the low-speed operation voltage regulator into the halver mode and the
VDC3 register is used to set the LCD system voltage circuit. However, the supply voltage must be 2.4
V or more to set the halver mode. Furthermore, the halver mode cannot be set during high-speed
operation using the OSC3 clock.
In the normal mode, the low-speed operation voltage regulator and LCD system voltage circuit
operate with the supply voltage V
At initial reset, the normal mode is set by hardware.
The voltage halver always operates regardless of the mode set.

4.2.2 Power control procedure

At initial reset, the power supply, operating voltage and oscillation circuit are set as follows:
• Low-speed operation voltage regulator: ON
• LCD system voltage circuit:
• High-speed operation voltage regulator: OFF
• CPU/internal logic operating voltage:
• CPU system clock:
• OSC3 oscillation circuit:
Setting halver mode
The low-speed operation voltage regulator and the LCD system voltage circuit can be set into the
halver mode independently.
Setting the low-speed operation voltage regulator
The low-speed operation voltage regulator can be set into the halver mode under the conditions
below.
• When the supply voltage V
• When the CPU/internal circuits operate with the V
The following shows the switching procedure from normal mode to halver mode.
1. Switch the CPU clock from OSC3 to OSC1 (CLKCHG = "0", when OSC3 is used as the CPU clock)
2. Stop the OSC3 oscillation (OSCC = "0")
3. Switch the internal operating voltage from V
4. Turn the high-speed operation voltage circuit off (VDC1 = "0")
5. Check that the supply voltage V
6. Set the halver mode (VDC2 = "1")
Steps 1 to 4 are necessary during high-speed operation.
Setting the LCD system voltage circuit
The LCD system voltage circuit can be set into the halver mode under the conditions below.
• When the supply voltage V
• When the V setup value for driving the LCD is 1.13 V or lower.
C1
The following shows the switching procedure.
1. Check that the supply voltage V
2. Set the LCD drive voltage V
3. Set the halver mode (VDC3 = "1")
26
by halving the supply voltage V
D2
directly.
DD
Normal mode (VDC2 = "0")
OFF
Normal mode (VDC3 = "0")
V
D1L
OSC1
OFF
is 2.4 V or higher.
DD
to V
D3
is 2.4 V or higher using the SVD circuit
DD
is 2.4 V or higher.
DD
is 2.4 V or higher using the SVD circuit
DD
to 1.13 V or lower (LC3–LC0 ≤ 6)
C1
EPSON
. Using this halved supply
DD
(LPWR = "0")
(VDC1 = "0")
(VDC0 = "0")
(CLKCHG = "0")
(OSCC = "0")
operating voltage and OSC1 operating clock.
D1L
(VDC0 = "0")
D1L
S1C63666 TECHNICAL MANUAL