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Register
Address
D3
D2
RLD03 RLD02 RLD01 RLD00
FFC6H
R/W
RLD07 RLD06 RLD05 RLD04
FFC7H
R/W
RLD13 RLD12 RLD11 RLD10
FFC8H
R/W
RLD17 RLD16 RLD15 RLD14
FFC9H
R/W
RLD23 RLD22 RLD21 RLD20
FFCAH
R/W
RLD27 RLD26 RLD25 RLD24
FFCBH
R/W
PTD03 PTD02 PTD01 PTD00
FFCCH
R
PTD07 PTD06 PTD05 PTD04
FFCDH
R
PTD13 PTD12 PTD11 PTD10
FFCEH
R
PTD17 PTD16 PTD15 PTD14
FFCFH
R
PTD23 PTD22 PTD21 PTD20
FFD0H
R
PTD27 PTD26 PTD25 PTD24
FFD1H
R
0
EIPT2
EIPT1
FFE1H
R
R/W
0
0
FFE2H
R
0
0
FFE3H
R
S1C63666 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Memory Map)
Table 4.1.1 (f) I/O memory map (FFC6H–FFE3H)
∗1
D1
D0
Name Init
RLD03
0
RLD02
0
RLD01
0
RLD00
0
RLD07
0
RLD06
0
RLD05
0
RLD04
0
RLD13
0
RLD12
0
RLD11
0
RLD10
0
RLD17
0
RLD16
0
RLD15
0
RLD14
0
RLD23
0
RLD22
0
RLD21
0
RLD20
0
RLD27
0
RLD26
0
RLD25
0
RLD24
0
PTD03
0
PTD02
0
PTD01
0
PTD00
0
PTD07
0
PTD06
0
PTD05
0
PTD04
0
PTD13
0
PTD12
0
PTD11
0
PTD10
0
PTD17
0
PTD16
0
PTD15
0
PTD14
0
PTD23
0
PTD22
0
PTD21
0
PTD20
0
PTD27
0
PTD26
0
PTD25
0
PTD24
0
∗3
∗2
0
–
EIPT0
EIPT2
0
EIPT1
0
EIPT0
0
∗3
∗2
0
–
0
EISIF
∗3
∗2
0
–
∗3
∗2
0
–
R/W
EISIF
0
∗3
∗2
0
–
0
EIK0
∗3
∗2
0
–
∗3
∗2
0
–
R/W
EIK0
0
1
0
MSB
Programmable timer 0 reload data (low-order 4 bits)
LSB
MSB
Programmable timer 0 reload data (high-order 4 bits)
LSB
MSB
Programmable timer 1 reload data (low-order 4 bits)
LSB
MSB
Programmable timer 1 reload data (high-order 4 bits)
LSB
MSB
Programmable timer 2 reload data (low-order 4 bits)
LSB
MSB
Programmable timer 2 reload data (high-order 4 bits)
LSB
MSB
Programmable timer 0 data (low-order 4 bits)
LSB
MSB
Programmable timer 0 data (high-order 4 bits)
LSB
MSB
Programmable timer 1 data (low-order 4 bits)
LSB
MSB
Programmable timer 1 data (high-order 4 bits)
LSB
MSB
Programmable timer 2 data (low-order 4 bits)
LSB
MSB
Programmable timer 2 data (high-order 4 bits)
LSB
Unused
Enable
Mask
Interrupt mask register (Programmable timer 2)
Enable
Mask
Interrupt mask register (Programmable timer 1)
Enable
Mask
Interrupt mask register (Programmable timer 0)
Unused
Unused
Unused
Enable
Mask
Interrupt mask register (Serial I/F)
Unused
Unused
Unused
Enable
Mask
Interrupt mask register (K00–K03)
EPSON
Comment
23
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