Advantech PCI-1671UP Startup Manual page 30

High-performance gpib pci interface card; high-performance gpib usb interface module
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Option
IbcREADDR
IbcAUTOPOLL
IbcCICPROT
IbcIRQ
IbcSC
IbcSRE
IbcEOS
IbcEOSrd
IbcEOSwrt
GPIB-488
Table 3-3. ibconfig Options (Continued)
Valid for
Forced re-addressing. If
dev
re-addressing is disabled
non zero = Forced re-addressing is enabled.
Enable/Disable Automatic Serial Polling. If
bd
then Automatic Serial Polling is disabled. Otherwise, it
is enabled.
CIC Protocol. If value is 0, then CIC Protocol is not
bd
used. Otherwise, CIC Protocol is used.
Enable/Disable Hardware Interrupts. If
bd
hardware interrupts are disabled, otherwise
specifies the IRQ level the board uses to generate
interrupts.
Request/Release System Control. If
bd
board is not able to support routines requiring system
controller capability.
If
value
requiring system controller capability.
Assert/Unassert REN. If
bd
unasserted. Otherwise, the REN line is asserted.
/
EOS termination mode and character. The value lower
bd
dev
byte determines the EOS character. The value upper
byte third bit determines whether reads are terminated
when the EOS character is detected. The value upper
byte fourth bit determines whether EOI is set with the
EOS character on writes. The value upper byte fifth bit
determines whether all 8 bits of the EOS character
should be compared; otherwise, only 7 bits are
compared.
/
Recognize EOS. If
bd
dev
terminated when the End-Of-String (EOS) character is
detected. Otherwise, EOS detection is disabled.
/
Assert EOI. If
bd
dev
when the EOS character is sent. Otherwise, EOI is not
asserted.
3-13
Chapter 3
Description
value
is non-zero, the board can support routines
value
is non-zero, a read is
value
is non-zero, then EOI is asserted
value
Programming Reference Manual
GPIB 488.1 Library Reference
= 0, forced
is 0,
value
is 0, then
value
value
is 0, the
value
is 0, the REN line is

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