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2 Intel FPGA HDMI Design Example Detailed Description
UG-20077 | 2017.11.06
audio_data
audio_info_ai
audio_N
audio_CTS
audio_metadata
audio_format
aux_ready
aux_data
aux_sop
aux_eop
aux_valid
gcp
info_avi
info_vsi
vid_data
vid_vsync
vid_hsync
vid_de
tx_i2c_avalon_waitrequest
tx_i2c_avalon_address
tx_i2c_avalon_writedata
tx_i2c_avalon_readdata
tx_i2c_avalon_chipselect
tx_i2c_avalon_write
tx_i2c_avalon_irq
hdmi_tx_i2c_sda
hdmi_tx_i2c_scl
hdmi_tx_hpd_n
tx_hpd_ack
tx_hpd_req
HDMI TX Core Signals
Input
256
Input
49
Input
22
Input
22
Input
166
Input
5
Output
1
Input
72
Input
1
Input
1
Input
1
Input
6
Input
113
Input
62
Input
N*48
Input
N
Input
N
Input
N
2
I
C and Hot Plug Detect Signals
Output
1
Input
3
Input
32
Output
32
Input
1
Input
1
Output
1
Inout
1
Inout
1
Input
1
Input
1
Output
1
®
Intel
FPGA HDMI Design Example User Guide for Intel
HDMI TX core auxiliary interfaces
HDMI TX core sideband signals
HDMI TX core video ports
Note: N = symbols per clock
2
I
C master Avalon-MM interfaces
HDMI TX DDC and SCDC interfaces
HDMI TX hotplug detect interfaces
®
Arria 10 Devices
31
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