Chipset Configuration; North Bridge; Iio Configuration - Supermicro 2028UT-BC1NRT User Manual

SUPERSERVER 2028UT-BTNRT/BC1NRT User's Manual
Chipset Configuration
North Bridge
This feature is used to configure Intel North Bridge settings.
Integrated IO Configuration
EV DFX (Device Function On-Hide) Features
When this feature is set to Enable, the EV_DFX Lock Bits that are located on
a processor will always remain clear during electric tuning. The options are
Disable and Enable.

IIO Configuration

Note: For /IIO1 Configuration/IIO2 Configuration/ IIO3 Configuration,
please refer to Page 4-16.
IIO0 Configuration
PCI-E Completion Timeout
Select Enable for PCI-E Completion Timeout support for electric tuning. The
options are Enable and Disable.
PCI-E Completion Timeout Value
Use this item to set the PCI-E Completion Time-out value for electric tuning.
Enter a value between 260ms to 900ms.
PCI Express Port 0 (DMI)
Note: For PCI Express Port 1A/Port 1B/Port 2A/Port 2B/Port 2C/Port 2D/
Port 3A/Port 3B/Port 3C/Port 3D, see the next section.
Use the items below to configure the PCI-E settings for a PCI-E port specified
by the user.
The following items will display:
7-12