Lvds Port Connector (Cn23) - Aaeon GENE-HD05 User Manual

3.5" subcompact board
Hide thumbs Also See for GENE-HD05:
Table of Contents

Advertisement

4
GND
5
BKL_ENABLE
Note: LVDS BKL_PWR can be set to +5V or +12V by JP8. LVDS BKL_CONTROL can be
set by JP7.
2.4.23

LVDS Port Connector (CN23)

Pin
Pin Name
1
BKL_ENABLE
2
BKL_CONTROL
3
LCD_PWR
4
GND
5
LVDS_A_CLK-
6
LVDS_A_CLK+
7
LCD_PWR
8
GND
9
LVDS_DA0-
10
LVDS_DA0+
11
LVDS_DA1-
Chapter 2 – Hardware Information
GND
OUT
PIN 29
PIN 30
PIN 1
PIN 2
Signal Type
OUT
OUT
PWR
GND
DIFF
DIFF
PWR
GND
DIFF
DIFF
DIFF
+5V
Signal level
+3.3V/+5V
+3.3V/+5V
31

Advertisement

Table of Contents
loading

Table of Contents