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Figure 4.1
LSI53C1510 Functional Signal Groupings
System
Address
and
Data
PCI
Interface
Bus
Control
Interface
32-bit
33 MHz
Arbitration
Interrupt
Error
Reporting
Power
Management
Event
ROM
SRAM
Signals
Memory
Interface
EDO
DRAM
Signals
CLK
RST/
PCI_AD[31:0]
C_BE[3:0]/
PAR
FRAME/
TRDY/
IRDY/
STOP/
DEVSEL/
IDSEL/
REQ/
GNT/
INTA/
INTB/
SERR/
PERR/
PME/
MCE2_RD/
MCE2_WR/
MEM_CE[2:0]
MEM_WE/
MOE/_TESTOUT
MEM_ADDR[12:0]
MEM_DATA[7:0]
SCANMODE
SCAN_EN
SCAN_RAM_EN
SCAN_RST_EN
SCAN_TEST_CLK_EN
TEST_HSC
TEST_DRAMCLK
TESTIN
DRAM_CASFB_A
DRAM_CASFB_B
DRAM_WE/
DRAM_OE/
DRAM_ADDR[12:0]
DRAM_DATA[31:0]
DRAM_PAR[3:0]
DRAM_RAS/[3:0]
DRAM_CAS/[7:0]
Signal Groupings
LSI53C1510
A_SD[15:0] /
A_SDP[1:0] /
A_SC_D /
A_SI_O /
A_SMSG /
A_SREQ /
A_SCTRL/
A_SACK /
A_SBSY /
A_SATN /
A_SRST /
A_SSEL /
A_DIFFSENS
A_RBIAS
SCLK
B_SD[15:0] /
B_SDP[1:0] /
B_SC_D /
B_SI_O /
B_SMSG /
B_SCTRL/
B_SREQ /
B_SACK /
B_SBSY /
B_SATN /
B_SRST /
B_SSEL /
B_DIFFSENS
B_RBIAS
A_GPIO[4:0]
B_GPIO[4:0]
RXT
TXT
TCK
TMS
TDI
TDO
TRST/
ARM_TMS
ARM_TDO
ARM_TRST/
XINT
POWER_FAIL/
SCSI LVD
Channel
A
SCSI
Interface
SCSI LVD
Channel
B
SCSI
GPIO
Functions
UART
JTAG
Misc.
Interface
ARM
Debug
ARM
RAID Mode
4-3
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