Flash Address Register (Flash_Ar); Option Byte Register (Flash_Obr) - ST STM32F101xx series Programming Manual
Stm32f10xxx flash memory microcontrollers
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- Reference manual (1096 pages) ,
- Reference manual (959 pages)
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PM0075
3.6
Flash address register (FLASH_AR)
Address offset: 0x14
Reset value: 0x0000 0000
31
30
29
w
w
w
15
14
13
w
w
w
Updated by hardware with the currently/last used address. For Page Erase operations, this
should be updated by software to indicate the chosen page.
Bits 31:0 FAR: Flash Address
Note: Write access to this register is blocked when the BSY bit in the FLASH_SR register is
3.7
Option byte register (FLASH_OBR)
Address offset 0x1C
Reset value: 0x03FF FFFC
Note:
The reset value of this register depends on the value programmed in the option byte and the
OPTERR bit reset value depends on the comparison of the option byte and its complement
during the option byte loading phase.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Reserved
r
Bits 31:25 Reserved, must be kept cleared.
Bits 25:18 Data1
Bits 17:10 Data0
Bits 9:2 USER: User option bytes
This contains the user option byte loaded by the OBL.
Bits [9:5]: Not used (if these bits are written in the Flash option byte, they will be read in this
register with no effect on the device.)
Bit 4: nRST_STDBY
Bit 3: nRST_STOP
Bit 2: WDG_SW
28
27
26
25
w
w
w
w
12
11
10
9
w
w
w
w
Chooses the address to program when programming is selected, or a page to erase when
Page Erase is selected.
set.
Data1
r
r
r
r
r
r
24
23
22
FAR[31:16]
w
w
w
8
7
6
FAR[15:0]
w
w
w
Data0
r
r
r
r
r
r
r
Doc ID 17863 Rev 1
Register descriptions
21
20
19
18
w
w
w
w
5
4
3
2
w
w
w
w
9
8
7
6
5
Not used
r
r
r
r
r
r
r
17
16
w
w
1
0
w
w
4
3
2
1
0
r
r
r
r
r
27/31
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