Epson 0C88832 Technical Manual page 91

MODE16: 00FF30H•D4
Selects the 8/16-bit mode.
When "1" is written: 16 bits × 1 channel
When "0" is written: 8 bits × 2 channels
Reading:
Select whether timer 0 and timer 1 will be used as 2
channel independent 8-bit timers or as a 1 channel
combined 16-bit timer. When "0" is written to
MODE16, 8-bit × 2 channels is selected and when
"1" is written, 16-bit × 1 channel is selected.
At initial reset, MODE16 is set to "0" (8-bit × 2
channels).
CKSEL0, CKSEL1: 00FF30H•D0, D1
Select the source clock of the prescaler.
When "1" is written: OSC3 clock
When "0" is written: OSC1 clock
Reading:
Select whether the source clock of prescaler 0 will
be set to OSC1 or OSC3. When "0" is written to
CKSEL0, OSC1 is selected and when "1" is written,
OSC3 is selected.
In the same way, the source clock of prescaler 1 is
selected by CKSEL1.
When event counter mode has been selected, the
setting of the CKSEL0 becomes invalid. In the same
way, the CKSEL1 setting becomes invalid when 16-
bit mode has been selected.
At initial reset, this register is set to "0" (OSC1
clock).
PSC00, PSC01: 00FF31H•D3, D4
PSC10, PSC11: 00FF32H•D3, D4
Select the dividing ratio of the prescaler.
Two-bit PSC00 and PSC01 is the prescaler dividing
ratio selection registers for timer 0, and the two-bit
PSC10 and PSC11 correspond to timer 1. The
prescaler dividing ratios that can be set by these
registers are shown in Table 5.10.10.2.
Table 5.10.10.2 Selection of prescaler dividing ratio
PSC11 PSC10
PSC01 PSC00
1 1
1 0
0 1
0 0
When event counter mode has been selected, the
setting of the PSC00 and PSC01 becomes invalid. In
the same way, the PSC10 and PSC11 setting
becomes invalid when 16-bit mode has been
selected.
At initial reset, this register is set to "0" (input
clock/1).
E0C88832/88862 TECHNICAL MANUAL
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Programmable Timer)
Valid
Valid
Prescaler dividing ratio
Input clock / 64
Input clock / 16
Input clock / 4
Input clock / 1
EVCNT: 00FF31H•D7
Selects the counter mode for the timer 0.
When "1" is written: Event counter mode
When "0" is written: Timer mode
Reading:
Select whether timer 0 will be used as an event
counter or a timer. When "1" is written to EVCNT,
the event counter mode is selected and when "0" is
written, the timer mode is selected.
At initial reset, EVCNT is set to "0" (timer mode).
FCSEL: 00FF31H•D6
Selects the function for each counter mode of timer 0.
• In timer mode
When "1" is written: Pulse width measurement
When "0" is written: Normal mode
Reading:
In the timer mode, select whether timer 0 will be
used as a pulse width measurement timer or a
normal timer. When "1" is written to FCSEL, the
pulse width measurement mode is selected and the
counting is done according to the level of the signal
(EVIN) input to the K10 input port terminal. When
"0" is written to FCSEL, the normal mode is selected
and the counting is not affected by the K10 input
port terminal.
• In event counter mode
When "1" is written: With noise rejecter
When "0" is written: Without noise rejecter
Reading:
In the event counter mode, select whether the noise
rejecter for the K10 input port terminal will be
selected or not.
When "1" is written to FCSEL, the noise rejecter is
selected and counting is done by an external clock
(EVIN) with 0.98 msec or more pulse width. (The
noise rejecter allows clocking counter at the second
falling edge of the internal 2,048 Hz signal after
changing the input level of the K10 input port
terminal. Consequently, the pulse width that can
reliably be rejected is 0.48 msec.)
When "0" is written to FCSEL, the noise rejector is
not selected and the counting is done directly by an
external clock (EVIN) input to the K10 input port
terminal.
At initial reset, FCSEL is set to "0".
EPSON
Valid
timer mode
Valid
Valid
85