Interrupt Function - Epson 0C88832 Technical Manual

5.9.3 Interrupt function

The stopwatch timer can generate an interrupt by
each of the 100 Hz (approximately 100 Hz), 10 Hz
(approximately 10 Hz) and 1 Hz signals.
Figure 5.9.3.1 shows the configuration of the
stopwatch timer interrupt circuit
The corresponding factor flags FSW100, FSW10 and
FSW1 are respectively set to "1" at the falling edge
of the 100 Hz, 10Hz and 1Hz signal and an inter-
rupt is generated. Interrupt can be prohibited by
the setting of the interrupt enable registers ESW100,
ESW10 and ESW1 corresponding to each interrupt
factor flag.
Address
100 Hz falling edge
Address
Address
10 Hz falling edge
Address
Address
1 Hz falling edge
Address
Address
SWD0
1/100 sec
SWD1
counter
SWD2
BCD data
SWD3
100 Hz interrupt
10 Hz interrupt
SWD4
1/10 sec
SWD5
counter
SWD6
BCD data
SWD7
1 Hz interrupt
E0C88832/88862 TECHNICAL MANUAL
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Stopwatch Timer)
Interrupt priority
register PSW0, PSW1
Interrupt factor
flag FSW100
Interrupt enable
register ESW100
Interrupt factor
flag FSW10
Interrupt enable
register ESW10
Interrupt factor
flag FSW1
Interrupt enable
register ESW1
0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4
In addition, a priority level of the stopwatch timer
interrupt for the CPU can be optionally set at levels
0 to 3 by the interrupt priority registers PSW0 and
PSW1.
For details on the above mentioned interrupt
control registers and the operation following
generation of an interrupt, see "5.14 Interrupt and
Standby Status".
The exception processing vector addresses of each
interrupt factor are respectively set as shown
below.
100 Hz interrupt:
10 Hz interrupt:
1 Hz interrupt:
Figure 5.9.3.2 shows the timing chart for the
stopwatch timer.
Interrupt priority
level judgement
circuit
Fig. 5.9.3.1
Configuration of the stopwatch timer
interrupt circuit
EPSON
000016H
000018H
00001AH
Interrupt
request
Fig. 5.9.3.2
Stopwatch timer
timing chart
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