HP 16550A User Reference page 260

100-mhz state/500-mhz timing logic analyzer
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Index
G
General Purpose Probing, 2–7 to 2–10
Glitch Acquisition Mode, 4–5
Grabbers, 2–9
I
Illegal configuration, 3–6
Input Voltage for Probes, 2–10, 12–4
interface
preprocessor, 2–4
universal, 2–4
interface kit
probing, 2–3
interfaces
HP-IB, 1–2
RS-232C, 1–2
Intermodule Configuration
in mixed display, 10–3
inverse assembler
preprocessor, 2–4
L
Label and Pod Rolling fields, 4–24
Label Assignment fields, 4–24
Label polarity fields, 4–25
Labels, 4–24
Labels Assignment, 5–32
Labels field, 5–32
Listing Menu, 6–2
clear pattern field, 6–16
data roll field, 6–23
find x-pattern/o-pattern field, 6–6
from trigger/start/x-marker field, 6–8
label and base fields, 6–12, 6–24
label/base roll field, 6–12, 6–24
markers field, 6–4
menu map, 6–2
pattern display field, 6–11
pattern occurrence field, 6–7
specify patterns field, 6–9 to 6–11
states markers, 6–21
statistics markers, 6–19
stop measurement field, 6–13 to 6–15
trig to x/trig to o field, 6–22
trig to x/trig to o fields, 6–18, 6–20
Index-2
x and o entering/leaving fields, 6–10
x to o display field, 6–18, 6–22
Loading on signal line, 2–10
Logic analyzer, 1–2
M
Macros, 5–11
definition, 5–11
state, 5–16 to 5–18
timing, 5–14 to 5–15
using, 5–13
Marker Label/Base and Display, 7–28,
7–30, 7–33, 7–35
Markers
chart menu, 8–12
listing menu, 6–5
mixed display menu, 10–8
pattern, 7–13
states, 6–21, 7–31, 8–27
statistics, 7–29
statistics markers, 6–19, 8–25
time, 7–26
time markers, 6–17, 8–23
Markers field, 6–4, 7–12, 8–11
Mask field, 9–11
Master and Slave Clock field, 4–20 to
4–21
Master and Slave Clock selections, 4–20
Maximum Probe Input Voltage, 2–10,
12–4
Menu Maps
chart menu, 8–3
compare menu, 9–3
configuration menu, 3–2
format menu, 4–2
listing menu, 6–2
trigger menu, 5–3
waveform menu, 7–2
Microprocessor measurements, 1–6
microprocessor mnemonics, 2–4
Min and Max Scaling Fields, 8–10
Mixed Display
markers, 10–8
Mixed Display Menu, 10–2
inserting waveforms, 10–4
interleaving state listings, 10–5 to 10–6
intermodule configuration, 10–3
markers, 10–8
time-correlated displays, 10–7
mnemonics
microprocessor, 2–4
Modify trigger field, 5–8 to 5–10, 5–12
N
Name: field, 3–3
Negative delay, 7–9
O
Occurrence counters, using, 5–23
Occurrence field, 6–7, 7–14, 8–14
Occurs Field, 5–23
P
Pattern durations, using, 5–22
Pattern Markers, 6–5, 7–13, 8–12
chart menu, 8–12
listing menu, 6–5
waveform menu, 7–13
Pattern occurrence fields, 6–7, 7–14, 8–14
Pod Clock Field, 4–15 to 4–18
Pod Field, 4–4, 4–14
Pod Grounding, 2–8
Pod Threshold
levels, 4–19
Pod Threshold field, 4–19
Pod Thresholds, 2–10
Polarity, 4–25
Post-processing Features
chart menu, 8–2
compare menu, 9–3
Pre-defined sequence type, 5–11
Preprocessors, 1–6
using, 1–6
Probe Cables, 2–10
Probe Connecting
disconnecting probes from pods, 2–13
grabbers to probes, 2–14
grabbers to test points, 2–14
pods to probe cables, 2–12
Probe Cables to Analyzer, 2–11 to 2–12
probe interface, 2–3
Probe Leads, 2–9
Probe Tip Assemblies, 2–7

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