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It is high for HDCD x2 gain. The stereo analogue output
goes out as 2 stereo pairs on SK6. It also goes off to the
SCART AV output - SCART_L, SCART_R.
Sheet 6 - Video filters and buffers
On this sheet there are 6 channels of filtering and buffers
for the video signals. If we consider the signal path for
SVID_Y, C113, L3, C119, and C107 form an elliptical
filter, and R1 provides 75R termination. Z23B is an op-
amp with a gain of +2, C93/C31 provide AC coupling and
R104 is the 75R source termination. This same circuit is
duplicated for all the other channels. The CVBS output has
2 source terminators, so that the SCART and composite
outputs can both be used simultaneously.
Sheet 7 - Video outputs and SPDIF outputs
This sheet shows all the video output connectors, the
SCART status circuit and the SPDIF output.
S-Video goes out on SK8, Composite and YUV
component go out on SK7, and the SCART output is on
SK9.
The SCART status circuit is a piece of analogue circuitry
that takes 2 control lines from the DSP board, and
generates 2 status signals for the SCART output.
ENABLE_AV is a control line from the DSP board that is
high (3V) whenever the player is not in standby.
16/9 is another control line from the DSP board. This is set
high (5V) to indicate 16:9 anamorphic material. At present
this is implemented by setting it high when 16:9 TV type
is selected in the setup menu.
The output 0/6/12 is designed so that it is 0V when the
player is in standby, or 6V when playing 16:9 material, or
12V when playing 4:3 material.
The output AV_CTL is simply ENABLE_AV after an
emitter follower.
The spec for these outputs is as follows, typical
measurements are given vs the spec:
ENABLE
16:9
0/6/12
_AV
0
0
0V
1
0
0V
0
1
6.3V
1
1
10.6V
The SPDIF output is shown at the bottom of the page. Z26
is used to buffer the signal and 3 gates are used an parallel
in order to provide sufficient drive. The resistor values of
R7,8,11 and R71 have been chosen such that the output is
attenuated to the correct level, and also to provide 75R
output impedance. T1 is an isolating transformer with a
turns ratio of 1:1.
Z25 is a TOSLINK optical transmitter. This is a 6Mbit./s
part, so operation at 96kHz sampling rate is not guaranteed
(requires 12Mb/s).
Specifications
Analogue Audio
Output level:
2.2V rms for 0dB signal +/- 0.1V
Frequency response 20Hz to 20kHz (+0.1, -0.5 dB)
THD+N
<0.005% for 1kHz 0dB signal,
measured 22Hz-22kHz, unweighted
S/N
>90dB at 1kHz 0dB, unweighted
Digital Audio
To IEC 958.
Amplitude:
500mV +/- 20% pk-pk into 75R
Video
Composite: 700mV nominal (in PAL) black-peak white
into 75R
(spec)
AV_
(spec)
CTL
0-2V
0V
0-0.4V
2-9.5V
2.8V
1-3V
9.5-
2.8V
1-3V
12V
S-Video: Y 700mV nominal (in PAL) black-peak white (in
PAL) into 75R
S-Sideo: C 885mV pk-pk nominal (in PAL) into 75R
Component Y: 700mV nominal (in PAL) black to peak white
into 75R.
Component U: 700mV pk-pk nominal for 100% colour bars,
into 75R.
Component V: 700mV pk-pk nominal for 100% colour bars,
into 75R.
L886 Display Circuit
Summary
This board is used in the DV88 DVD player. It contains the
front panel VFD display, buttons, LEDs and remote IR receiver.
The board for the FMJ player (DV27) will be electrically the
same, but with a different PCB layout, since the 2 players are
mechanically different in this area.
Circuit description
Z1 is a Rohm BU2872AK VFD driver IC. It has 4 wire serial
interface with the system CPU, comprising the following
signals:
SO
Data out (from Rohm chip to CPU)
SI
Data in (from CPU to Rohm chip)
CS
Chip select (driven by CPU)
SCK
Serial clock (driven by CPU)
All the interaction with the system CPU is via this bus, with the
exception of the remote IR data, which has its own interface.
The Rohm chip drives the VFD display via SEG1..15 and G1..7.
It also has some other functions.
LEDs: The chip has 4 outputs to drive LEDs L1..4. These are
used to drive the 2 front panel LEDs, HDCD and On/standby,
the latter is a bi-colour LED that is green to indicate on, red to
indicate standby. L2 and L3 are used to control the VKK
switching circuit.
Button scanning: The rohm chip also scans the front panel
buttons. The buttons form a matrix which is scanned by the
segment driver lines S3..6. The resulting matrix is read on inputs
K2,3,4 on the chip.
Filament supply bias: The filament voltage F1/F2, is supplied as
a floating 4V3 DC supply. This is biased to the correct level by
zener diode D5, so that F1 is 5V6 above grid voltage VKK.
VKK is nominally -19.5V, therefor F1 is normally -13V9, and
F2 is normally -9V6.
VKK switching circuit: The Rohm chip has an unfortunate fault
in that it does not initialise its display RAM on power up. This
results in random patterns being displayed momentarily on
power up. To fix this, it was necessary to include the VKK
switching circuit comprising Z2, Q5, Q6 and associated
components. D type latch Z2A is arranged so as to always
power up in a cleared state, by the inclusion of R13/C7 which
clear it on power up. The D and CLK inputs of the latch are
controlled by the L3 and L4 outputs of the Rohm chip, this
allows the system software to set or clear the latch as required.
The latch output controls transistor Q6 which switches the VKK
supply voltage to the rohm chip. By inhibiting this supply until
it is required, we ensure the display always powers up blank,
and we switch it on only when we have initialised it correctly,
avoiding the random characters.
Remote IR receiver: RX1 is an IR receiver module. The output
of this is converted to an open collector type signal by Q3/Q4.
This is required because the DV27 FMJ player will feature a
remote bus input, which will simply be wire-OR'd with this to
provide remote control from the remote bus.
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