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Circuit Description
Refer to L878 circuit diagrams
Sheet 1 - Top level
This sheet is the top level of the schematic showing how
the other sheets fit together, and some of the interfaces on
the board.
SK1 is the audio interface with the DSP board.
Signal descriptions:
CK256FS_DSP
Audio master clock to DSP board
XMUTE
Mute signal from DSP board
ADIN
I2S audio data for L, R
AD2IN
I2S audio data for LS, RS (used on
nd
2
DAC board)
AD3IN
I2S audio data for C, SUB (used on
nd
2
DAC board)
BCK_IN
I2S audio bit clock
LRCK_IN
I2S audio word clock
SPDIF_IN
SPDIF audio from DSP board
FSEL1..0
Control lines to select 1 of 4
frequencies of audio master clock
NRESET
Power on reset signal from DSP
board, active low.
MD
SPI data to configure audio DACs
MC
SPI clock to configure audio DACs
ML_8716_L
SPI load signal to configure left
ML_8716_R
SPI load signal to configure right
ML_8716_X
SPI
load
surround DACs (on 2
GAIN
HDCD gain scaling signal, high for
HDCD x2 gain
nd
SK3 connects to the 2
DAC board when this is fitted.
nd
The 2
DAC board can then pick up the signals it needs.
SK11 is also an expansion connector for this 2
board. This connector is for some of the power supplies it
will need.
Sheet 2 - Analogue power
This sheet shows the analogue audio power supply, and
also the regulators that are used for sensitive digital
supplies and the muting circuit.
AC power comes in on SK4. In the DV88 player this
comes from a winding on the transformer on the PSU
board. On the DV27, it will come from a separate torroidal
transformer (as in the FMJ CD23).
D2,3,4 and 10, with capacitors C1, C3 form a bridge
rectifier to generate unregulated DC supplies +UR and -
UR. These are the regulated down to +12V and -12V by
Z1 and Z4 respectively. The resulting rails +12VA and -
12VA are used by the output buffer stage.
The +12V rail is used to supply the DAC supply regulators
Z2 and Z3. These provide separate supplies for the 2 mono
DACs, +5V_DAC_L and +5V_DAC_R.
SK5 is where all the power arrives for digital circuitry and
video. +12V is used by the muting relay and the SCART
status circuit, and also feeds 2 x 5V regulators, Z9 and Z5.
Z9 produces +5V_CLOCK1 which is used by the clock
oscillator. Z5 produces +5V_CLOCK2 which is used by
the clock divider and buffer.
+5V also comes in on SK5, this is used by other digital
circuitry, and is used to derive +5V_VID via inductor L1.
+5V_VID powers the video section.
Z6 is a Toshiba TA317P muting chip, as used in other
products. This controls the muting relay RLY2. Z6 will
mute the output in several ways. Firstly, it arranges to
mute for about 2.5 seconds after power is applied.
DAC
DAC
signal
to
configure
nd
DAC board)
nd
DAC
Secondly, it mutes immediately if the mains is
disconnected. This is initiated by the AC sense signal from
D5. Finally, it can also mute when the signal XMUTE is
taken high. This is controlled by the system CPU so the
software can mute if required.
Sheet 3 - Re-clocking
This sheet shows the re-clocking latches Z7, Z8 and Z28.
These are clocked by CK256FS_RCK, and simply re-latch
the digital signals from the DSP board. The SPDIF signal
has been given its own latch chip rather than share with
another to avoid any interference from the SPDIF on to the
I2S lines.
The re-clocked I2S signals are split so that each DAC has
its own set of signals.
Sheet 4 - Clocks
This sheet shows the audio master clock circuit. 2 colpits
oscillators are provided with crystal frequencies of
24.576MHz and 22.5792MHz. Only one of these is
enabled at any time, this is determined by the state of
control line FSEL0. If FSEL0 is low the 22.5792MHz
oscillator will be on, if it is high the 24.576MHz oscillator
will be on.
The oscillator output may then be divided by 2 by Z10A.
Control line FSEL1 is used to select the divided or non-
divided version by controlling the output enable of Z14C
and Z14D. When selecting the non-divided version, we
clear Z10A for good measure to avoid noise.
Thus, 4 different clock frequencies can be selected by
FSEL1..0
FSEL1..0
Frequency
Relationship to Fs
0
11.2896
44.1K x 256
1
12.288
48K x 256
2
22.5792
88.2 x 256
(or 176.4 x 128)
3
24.576
96K x 256
(or 192 x 128)
The resulting signal is buffered before distribution by Z21
and Z14A. There are 5 clock signals distributed:
CK256FS_RCK
For re-clocking circuit
CK256FS_DAC_L
For left DAC
CK256FS_DAC_R
For right DAC
CK256FS_DSP
For DSP board
nd
CK256FS_EXT
For 2
(for surround channels of DVD-
Audio)
Sheet 5 - Audio DACs
This sheet shows the audio DACs and output buffer stage.
Z17 and Z18 are Wolfson WM8716 audio DACs. These
are stereo parts that can be operated in a mono mode. They
are configured via software so that Z17 provides the left
channel and Z18 provides the right channel.
The DACs are configured individually by having separate
load signals on the SPI bus. This is required because one
DAC has to be told to be the left DAC, and one has to be
the right. The additional DACs on the 2
have their own load signal as they will be used in stereo
mode.
The DAC outputs are differential. These outputs are
nd
filtered by the 2
order butterworth filters with differential
inputs. Z19A and its associated components filter the left
channel, and Z20A and associated components filter the
right channel.
Following the filters are amplifiers with switchable gain.
Z19B amplifies the left channel and Z20B amplifies the
right channel. For normal use these have a gain of -1. For
HDCD they will have a gain of -2. The gain switching is
accomplished by analogue switch Z11 which switches in
additional resistors. The signal GAIN controls the switch.
Typical use
CD audio
DVD-Video,
VCD
DVD-Audio
DVD-Audio
DAC board
nd
DAC board also
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