R, Θ, Dbm Computation; Output Select; The Host Processor - Stanford Research Systems SR844 User Manual

Rf lock-in amplifier
Table of Contents

Advertisement

2-14 SR844 Basics
outputs. In this case, the 18 kHz anti-aliasing filter in front of the IF analog-to-digital
converters is also removed. The output time constant is around 20-40
R, θ θ θ θ , dBm Computation
The DSP computes R[Volts] and

Output Select

Two quantities are selected for the front panel CH1 and CH2 analog outputs. These
outputs may be expanded (by 10 or 100) before being sent to the output digital-to-analog
converters. The outputs are buffered to
The output update rate for X and Y is between 48 and 96 kHz for time constant filter
slopes of 6 and 12 dB/oct as well as No Filter. The X and Y update rate for 18 and 24
dB/oct filtering is 4 times slower, or 12-24 kHz. The update rate for R and
12-24 kHz.
Two quantities are also selected for the front panel displays. Each of these may be
expanded (by 10 or 100) before being sent to the host processor for display and storage.

The Host Processor

The host processor provides the interface between the front panel, the instrument
configuration, the DSP and the remote ports (GPIB and RS-232). The host processor
receives the front panel output values from the DSP and displays them and sends the data
to the remote ports. The host also computes X-noise and Y-noise from the X and Y data.
SR844 RF Lock-In Amplifier
θ
from X and Y, and R[dBm] from R[Volts].
±
10 V.
µ
s in this case.
θ
is also

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents