Configuration Registers - Infineon Technologies TC1784 User Manual

Field Bits
CB0 18
CB1 19
CB3 20
TP 21
0 2,
[15:5],
[31:22]

3.2.12.2 Configuration Registers

Reset Counter Control Register
This register controls the reset length settings for the three resets.
User´s Manual
32-bit SCU, V1.18
Type Description
rh Reset Request Trigger Reset Status for Cerberus
System Reset
0 The last reset was not requested by this reset
B
trigger
1 The last reset was requested by this reset
B
trigger
rh Reset Request Trigger Reset Status for Cerberus
Debug Reset
0 The last reset was not requested by this reset
B
trigger
1 The last reset was requested by this reset
B
trigger
rh Reset Request Trigger Reset Status for Cerberus
Application Reset
0 The last reset was not requested by this reset
B
trigger
1 The last reset was requested by this reset
B
trigger
rh Reset Request Trigger Reset Status for TP
0 The last reset was not requested by this reset
B
trigger
1 The last reset was requested by this reset
B
trigger
r Reserved
Read as 0; should be written with 0.
3-71
System Control Unit (SCU)
V1.1, 2011-05
TC1784