Xilinx Virtex-4 FX FPGA User Manual page 21

R
Table 15: XGI Header (J11) (Continued)
Table 16: XGI Header (J10)
The pin order in
not reflect the physical connection to this connector.
Table 17: XGI Header (J14)
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ML42x User Guide
UG087 (v1.3) May 30, 2008
Pin Number ML421
26 VCC3
27 VCC3
28 NC
29 VCC5
30 VCC5
31 VCC5
32 VCC5
Pin Number ML421
1 - 32
VCCO
Table 17 is arranged from top to bottom as viewed on the board. It does
Pin Number ML421
2 E20
4 D20
6 E22
8 E21
10 C23
12 C22
14 D24
16 C24
18 E23
20 D23
22 F24
24 F23
26 H22
28 G22
30 K22
32 L23
34 K21
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ML423 ML424
VCC3 VCC3
VCC3 VCC3
NC NC
VCC5 VCC5
VCC5 VCC5
VCC5 VCC5
VCC5 VCC5
ML423 ML424
VCCO VCCO
ML423 ML424
G22 J27
H22 K27
C24 J29
D24 H29
E26 D30
D26 C30
C28 L31
C27 L30
F28 E32
E28 D32
G26 G30
F26 F30
J25 E29
H25 F29
L26 F33
L25 E33
E24 K29
Detailed Description
21