Dräger Babylog 8000 Technical & Service Manual page 45

Function description
Bus interface
DTACKQ
Control bus
Adress bus
Data bus
Analog Input
Digital Input
Fig. 19: Block diagram of the Monitoring PCB
Block diagram of the Watchdog PCB of the Monitoring PCB (in new boards the Watchdog PCB is
integrated into the Monitoring PCB).
Dräger Medical AG & Co. KGaA
INTQ
DTACKQ
generator
Adress
decoder
Control bus
Adress bus
S & H
(Filter)
6173.3
Z80-Bus
Adress
decoder
EPROM
64 k
RAM
8 k
Dual-
Port-
RAM
Watch dog
PIO
PCB
A
D
PIO
Babylog 8000
4 MHz
Z 80
CPU
Timer
Watchdog
Status
display
43