Philips HDRW720 Service Manual page 80

Block Diagrams, Waveforms, Wiring Diagram.
Control Block Diagram Analog Board, uP Board
DVIO-Board Digital Board
DVIO Digital Board
P-Subprint
8
A0-A7
5
A_DATA
ext. Latch
D_DATA
A_RDY
D_RDY
IRESET_DIG
LEVELSW
2 INT, IPOR_DC
int. RAM int. ROM
I2C
I2C 3,3V
Level
Shifter
5
2
I2C
SWITCH I2C_SW
2
5SW
8
PSS
PWONSW SB1
SFS_TS
AFC
AGC
5
ADC/DAC
Frontend
(UDA1334BTS
Video
UDA1361TS)
SIF1
2
WU
WSFI
5 FBIN
P50
8SC2
IO
EEPROM
Video
3
(M24C16)
I2C I2C
(STV6618) VSA1
( for EUROPE
VSA2
only)
ASC1S
For EUROPE only
2
I2C
Front P
2
TMP87CH74F
INT
IPOR_DC
HDRW720/0x, DVDR725H/0x 6.
Basic Engine
WE BE_FAN
BE_FAN
A0-A7 WE
Fan
Fan_off
ext. RAM ext. Flash
P50
Control
2
2
P50in
IPOR
P50out
INT
only
Central- P
Reset
TMP91CW12AF (3,3V Supply)
KILL
= >
1
5
FBIN
Frontend
DataSlicer
Audio
(STV5348)
(MSP)
RSA1
Follow Me
RSA2
2
STBY
IO
ION
Power
2
Audio
Supply
(HEF IC'S)
AKILL
Display
EN 80
BE
Sense 3V3STBY
Reset-IC
IPFAIL
TR 01019_001
130502