Philips HDRW720 Service Manual page 127

Circuit Diagrams and PWB Layouts
Digital Board Chrysalis F: VIPs
1 2 3
X1001
+3V3_VIP
+3V3
A
A: DC, 500mV/Div, 2us/Div
I010 I011
2061
3000
680R
100n
7002
74LVC1G32GW
1
4
B VIP_IGP1
2
3.3V
I012
0V
7003
C
BC847B
4007
VIP_FB
not used
7004
SAA7118E
D
CVBS_OUT_B_VIP
VIP_ANALOG_VIDEO_INPUT
M13
CVBS_Y_IN_A J2
K1
CVBS_Y_IN_B K2
CVBS_Y_IN_C L3
2052 47n K3
C_IN_VIP G4
2053 47n G3
G_IN_VIP H2
Y_IN_VIP J3
E
2054 47n H1
2063 47n E3
2064 47n F2
B_IN_VIP F3
U_IN_VIP G1
2056 47n F1
2065 47n B1
2071 47n D2
R_IN_VIP D1
V_IN_VIP E1
2058 47n D3
I001
M1
F
CLK_135
4001
MPIO5_VIP_ERROR
G
+5V +3V3_VIP
7006
H
LD1117D33
4 2
IN VOUT
5 3
NC VOUT
8 6
NC VOUT
1 7
GND VOUT
I
4005
PNX7100_ITU_IN_FID
VIP_FID
1 2 3
HDRW720/0x, DVDR725H/0x
4 5 6
I002
3021
100R
+3V3_VIP
3032 I004
100R
+3V3_VIP
I005
3033
100R
+3V3_VIP
I009
3034
100R
+3V3
I008
VDDE_7118 5009
AD-PORT
CONTROL IIC REGISTER MAP
FSW
A|11
FAST
A|12
A|13 SWITCH
A|14
DELAY
A|1D
Y
A|21 R
COMP
CB
G
A|22
B PROC
CR
A|23
RAW S
A|24
CB
A|2D CHROM YCBCR
C
CR
A|31
PROC
A|32
COMB
A|33
A|34 FIL
A|3D
Y LUM
Y
A|41 RAW
S
PROC
A|42 CBCR
A|43
S
S
A|44
SYNC
A|4D CBCR
X-PORT H-PORT
XTAL
VIDEO
GPO
AOUT
CLK
VSSA
F008
F009
3031
33R
not used
VIP_RTS1
F012
3013
1R0
1001
CX-8045G
24M576
4 5 6
7. EN 127
7 8 9
3005
100R
3008
100R
F003
VIP_INTA
VDDA VDDE VDDI
1ST TASK IIC REG MAP SCALER
2ST TASK IIC REG MAP SCALER F011
IGP1 K13
IGP0 L14
IGPV K14
SCALER EVENT CONTROLLER PNX7100_VS_IN
IGPH K12
PNX7100_HS_IN
IDP0 G14 ITU_IN(0)
IDP1 G12 ITU_IN(1)
IDP2 H11 ITU_IN(2)
IDP3 H14 ITU_IN(3)
IDP4 H13 ITU_IN(4)
IDP5 J14 ITU_IN(5)
IDP6 J13 ITU_IN(6)
IDP7 K11 ITU_IN(7)
ICLK M14
IDQ L13
TEXT
ITRDY N12
FIFO
ITRI L12
VBI DATA
SLICER ASCLK N11
F004
VIDEO/TEXT ALRCLK P12
F005
AMCLK P11
ARBITER
BOUNDARY
F006
AMXCLK M12
SCAN F007
VDDI_7118
VSSE VSSI
+3V3
JTAG_VIP_TRSTn
for DTTV only
JTAG_VIP_TDO
IIC0
JTAG_VIP_TDI
JTAG_VIP_TMS
JTAG_VIP_TCK
7 8 9
10 11 1001 H4
1003 I7
2014 H3
2015 A4
2016 A9
2017 A9
2018 A9
VDDA_7118
2019 A10
2020 A10
I003 2021 B8
5001
+3V3_VIP 2022 A10
2026 A5
2027 B9
A
2028 B9
2029 B9
2030 B9
2031 B10
2032 B10
2033 B10
2035 B6
VDDE_7118
2037 B5
2038 C9
I006 5005
2039 C9
+3V3_VIP
2040 C9
2041 C9
B 2042 C10
2043 C10
2044 C10
2048 C1
2049 C5
2050 C5
VDDI_7118
2052 E3
2053 E3
2054 E3
I007
5008
2056 E3
+3V3
2058 F3
2059 H4
2060 H4
C
2061 A3
2063 E2
2064 E3
2065 E2
2066 C4
2071 F3
2073 H2
3000 A2
3001 H5
3002 H5
IIC0
3004 C2
3005 C8
3006 C3
D
3007 H5
3008 C8
3009 D2
3010 E10
3011 G5
3012 G4
3013 G4
ITU_IN(7:0)
3014 H5
3015 G9
3016 G9
3017 G9
3018 G10
3019 F9
E
3020 H5
3021 A4
3010
3022 C4
PNX7100_ITU_IN_CLK
3023 H6
22R
3024 H6
3025 H6
PNX7100_ITU_IN_VAL
3026 H6
3027 H6
3028 H7
3029 H5
3030 H5
3031 F3
F
3032 A4
3033 A5
3034 B4
4001 G3
4002 G2
4003 C4
4005 I2
4007 C2
5001 A10
5005 B10
5008 C10
5009 C4
5010 A3
G
6000 B1
7002 B2
7003 C2
F013 7004 D3
7006 H2
F001 F4
F002 F5
F015
F003 D8
F004 F8
F005 F8
F006 F8
F016
F007 F8
F008 F4
H
F009 F4
F017
F011 D8
F012 G4
F013 G11
F014 I11
F018
F015 H11
F016 H11
F017 H11
F014
F018 H11
F019 I6
F020 I7
F0310 I6
F0312 I6
I
F0314 I6
F0316 I6
F0318 I5
F0320 I5
F0322 I5
F0324 I5
F0326 I5
F0328 I5
TR 17040_001
F0330 I5
090304
I001 F3
10 11
I002 A4
I003 A10
I004 A5
I005 A6
I006 B9
I007 C9
I008 C5
I009 B5
I010 A2
I011 A2
I012 C2