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Philips HDRW720 Service Manual page 197

Hard disc/dvd-video recorder
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Circuit-, IC descriptions and list of abbreviations
3V3_LINK
+3V3 Power supply for Link+Codec
IC7431
3V3_F
+3V3 Power supply for optional Flash
memory IC7432
3V3_RAM
+3V3 Power supply for SDRAM
IC7430
3V3_uP
+3V3 Power supply for Micro-
controller IC7802
3V3_32kHz
+3V3 Power supply for audio format
adaptation circuitry IC7507 and
IC7508
3V3_AC
+3V3 Power supply for audio system
clock generator IC7605 and IC7606
+5V
+5V Power supply
5V_PLL
+5V Power supply for VCO of audio
PLL IC7604
A (1:17)
Flash address lines of uPD72893
A_MUTE
Audio Mute
ABCK
Audio Bit Clock
AD (1:10)
Address bus lines for Host I/F of
Link+Codec IC7431
AEMP1
PCM1 emphasis ON/OFF for PCM1
output
AFS1
Audio sampling frequency indication
signal
ALRCLK
Audio Word Select
AMCLK44
11.2896MHz (=256 * 44.1 kHz) audio
master clock signal for 44.1 kHz audio
AMCLK48
12.288MHz (=256 * 48 kHz) audio
master clock signal for 32 kHz and 48
kHz audio
APWM
PWM signal for audio PLL
ASIC
Application Specific Integrated Circuit
BUFENn_AUD
Buffer Enable Audio
BUFENn_VID
Buffer Enable Video
CLK27M_CON
27MHz Clock to Digital Board
CS
Parallel interface chip select input of
Link+Codec IC7431
CTL (0:1)
Link interface control lines
CTSN
Clear to Send
D (0:15)
Flash data lines of Link+Codec
IC7431
DCDi
Directional Correlational
Deinterlacing. Circuitry that reduces
jaggies on diagonal edges when
deinterlacing video-sourced material.
DV_STATUS
Interrupt pin for reading DV-status
HS_CLK
Video clock input of Link+Codec
IC7431
INT
Interrupt request output of Link+Codec
IC7431 (input to Micro-Controller)
IOR
Parallel interface IO read control input
of Link+Codec IC7431
ISPN
In System Programming signal (used
for programming IC7802)
LKON
Link-on signal outputLPSLink power
status inputLREQLink request input
MA (0:10)
SDRAM address lines of Link+Codec
IC7431
MCAS
SDRAM column address strobe signal
MCLK
SDRAM clock signal
MD (0:15)
SDRAM data lines of Link+Codec
IC7431
MRAS
SDRAM row-address strobe signal
MWE
SDRAM write enable signal
PCM1
Audio Serial Data Output of
Link+Codec IC7431
PCM1_NEW
'MSB justified' to I2S converted audio
serial data; audio serial data input of
audio DAC UDA1334A
PD (0:15)
Data bus lines for Host I/F of
Link+Codec IC7431
PHY_D (0:7)
Data bus connection between PHY
and LINK device
RESETn
DVIO board reset
HDRW720/0x, DVDR725H/0x
RESET_FM
Reset signal driven by Flashmaster
programming device
RESTB
Reset input of Link+Codec IC7431
RTSN
Request to Send
RWZ
Parallel interface read/write control
input of Link+Codec IC7431
RXD
Receive Data
SCLK
Link control output clock
TXD
Transmit Data
VPP
+10V switchable programming voltage
of microcontroller
YUV (0:7)
Digital Video
DVIO 1.8 Board
2V5
+2V5 Power supply for Link+Codec
IC7431
3V3
+3V3 Power supply
3V3_A
+3V3 Analog power supply for PHY
IC7400
3V3_D
+3V3 Digital power supply for PHY
IC7400
3V3_DLY
+3V3 Power supply for IC7500
3V3_LINK
+3V3 Power supply for Link+Codec
IC7431
3V3_F
3V3 Power supply for optional Flash
memory IC7432
3V3_RAM
+3V3 Power supply for SDRAM
IC7430
3V3_uP
+3V3 Power supply for Microcontroller
IC7802
3V3_32kHz
+3V3 Power supply for audio format
adaptation circuitry IC7507 & IC7508
3V3_AC
+3V3 Power supply for audio system
clock generator IC7605 & IC7606
+5V
+5V Power supply
5V_PLL
5V Power supply for VCO of audio PLL
IC7604
A(1:17)
Flash adress lines of uPD72893
A_MUTE
Audio Mute
ABCK
Audio Bit Clock
AD(1:10)
Address bus lines for Host I/F of
Link+Codec IC7431
AEMP1
PCM1 emphasis ON/OFF for PCM1
output
AFS1
Audio sampling frequency indication
signal
ALRCLK
AMCLK44
11,2896MHz (=256*44.1kHz) audio
master clock signal for 44.1kHz audio
AMCLK48
12,288MHz (=256*48kHz) audio
master clock signal for 32kHz
and48kHz audio
APWM
PWM signal for audio
PLLBUFENn_AUD
Buffer Enable
AudioBUFENn_VID
Buffer Enable
VideoCLK27M_CON
27MHz Clock to Digital Board
CS
Parallel interface chip select input of
Link+Codec IC7431
CTL(0:1)
Link interface control lines
CTSN
Clear to Send
D(0:15)
Flash data lines of Link+Codec
IC7431
DV_STATUS
Interupt pin for reading DV-status
HS_CLK
Video clock input of Link+Codec
IC7431
INT
Interrupt request output of Link+Codec
IC7431 (input to Micro-Controller)
IOR
Parallel interface IO read control input
of Link+Codec IC7431
9.
EN 197

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