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Register Descriptions
Data Register
The Data Register contains 32 bits that control the state of each output of the SCXI-1163.
Whenever the Data Register is selected by the Address Handler, the Data Register shifts in the
data present on the MOSI line, bit 31 first, and then latches the data when deselected. At power
up or at reset, the Data Register contains all logic highs. The Data Register has two addresses–
hexadecimal 0001 and 0006. After a write to address 0001, the Data Register drives the outputs
regardless of the jumper-set primary mode of operation (either serial or parallel). After a write to
address 0006, the Data Register drives the outputs only if the primary mode of operation is set to
serial; if the primary mode is set to parallel, the outputs are driven to the logic levels seen at the
rear connector.
Type:
Write-only
Word Size:
32-bit
Bit Map:
31
30
OUT(31)
OUT(30)
23
22
OUT(23)
OUT(22)
15
14
OUT(15)
OUT(14)
7
6
OUT(7)
OUT(6)
Bit
Name
31-0
OUT<31..0>
SCXI-1163 User Manual
29
28
OUT(29)
OUT(28)
21
20
OUT(21)
OUT(20)
13
12
OUT(13)
OUT(12)
5
4
OUT(5)
OUT(4)
Description
Output (31 through 0) – Determine the state of the outputs.
If set to 0, the outputs are driven low. If set to 1, the
outputs are pulled high.
4-4
27
26
OUT(27)
OUT(26)
19
18
OUT(19)
OUT(18)
11
10
OUT(11)
OUT(10)
3
2
OUT(3)
OUT(2)
© National Instruments Corporation
Chapter 4
25
24
OUT(25)
OUT(24)
17
16
OUT(17)
OUT(16)
9
8
OUT(9)
OUT(8)
1
0
OUT(1)
OUT(0)
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