Signal Connections - Advantech PCIE-1760 User Manual

3.3

Signal Connections

PCIE-1760 Pin Assignments
Description of pin use:
IDIn+ (n=0 ~ 7):
Isolated digital input +
IDIn- (n=0 ~ 7):
Isolated digital input -
PWMn (n=0~1):
Isolated or TTL digital output (for PWM)
Rn_OUT (n=2~7):
Normally Open/Closed pin of Relay output
Rn_NO (n=0~1):
Normally Open pin of Relay output
Rn_NC (n=0~1):
Normally Close pin of Relay output
Rn_COM (n=0~7):
Common pin of Relay output
GATEn + (n=0~1):
Counter n gate input +
GATEn - (n=0~1):
Counter n gate input -
CLKn + (n=0~1):
Counter n clock input +
CLKn - (n=0~1):
Counter n clock input -
PCIE-1760 User Manual
CN6
IGND 1 20
IDI 7- 2 21
IDI 6-/ GATE 1- 3 22
IDI 5- 4 23
IDI 4-/ CLK 1- 5 24
IDI 3- 6 25
IDI 2-/ GATE 0- 7 26
IDI 1- 8 27
IDI 0- / CLK 0- 9 28
PWM0 10 29
R7_OUT 11 30
R6_OUT 12 31
R5_OUT 13 32
R7_COM 14 33
R6_COM 15 34
R5_COM 16 35
R4_COM 17 36
R3_COM 18 37
R2_COM 19
16
IDI 7+
IDI 6+/ GATE 1+
IDI 5+
IDI 4+/ CLK 1+
IDI 3+
IDI 2+/ GATE 0+
IDI 1+
IDI 0+ / CLK 0+
PWM1
R4_OUT
R3_OUT
R2_OUT
R1_NO
R1_NC
R1_COM
R0_NO
R0_NC
R0_COM