Cmos Ram Configuration Information - IBM 5170 Technical Reference

Bit
0 Daylight Savings Enabled (DSE)-A 1 enables
daylight savings and a 0 disables daylight savings
(standard time). The system initializes this bit to
o.
~
Register C
Bit 7-Bit 4 IRQF, PF, AF, UF-These flag bits are read
only and are affected when the
I
AlE
I , I
PIE
I ,
and
I
VIE
I
interrupts are enabled in register B.
Bit 3-Bit 0 Reserved
Register D
Bit 7 Valid RAM Bit (VRB)-This bit is read only and
indicates the condition of the contents of the
CMOS RAM through the power sense pin. A
low state of the power sense pin indicates that the
real-time clock has lost its power (battery dead).
~
A 1 on the VRB indicates power on the real-time
clock and a 0 indicates that the real-time clock
has lost power.
Bits 6-Bit
0 Reserved
CMOS RAM Configuration Information
The following lists show bit definitions for the CMOS
configuration bytes (addresses hex OE- 3F).
Diagnostic Status Byte (Hex OE)
Bit 7 Real-time clock chip has lost power. A 0
indicates that the chip has not lost power, and a 1
~
indicates that the chip lost power.
1-48 System Board