System Timers - IBM 5170 Technical Reference

Address
Name
000000 to 512Kb system
07FFFF board
080000 to 128Kb
09FFFF
OAOOOOto 128Kb video
OBFFFF
RAM
OCOOOOto 128Kb I/O
ODFFFF expansion ROM
o
EOOOOto 64Kb Reserved
OEFFFF on system board
OFOOOO to 64Kb ROM on
OFFFFF
the system board
100000 to Maximum
FDFFFF memory 15Mb
FEOOOO to 64Kb Reserved
FEFFFF on system board
FFOOOO to 64Kb ROM on
FFFFFF
the system board
System Memory Map
System Timers
Function
System board memory
I/O channel memory - IBM Personal
Computer AT 128KB Memory
Expansion Option
Reserved for graphics display buffer
Reserved for ROM on I/O adapters
Duplicated code assignment at
address FEOOOO
Duplicated code assignment at
address FFOOOO
I/O channel memory - IBM Personal
Computer AT 512KB Memory
Expansion Option
Duplicated code assignment at
address OEOOOO
Duplicated code assignment at
address OFOOOO
The system has three programmable timer/counters controlled by
an Intel 8254-2 timer/counter chip and defined as Channels 0
through 2 as follows:
Channel 0 System Timer
GATE 0 Tied on
CLK IN 0 1.190 MHz OSC
CLK OUT 0 8259A IRQ 0
Channel 1 Refresh Request Generator
1-8 System Board