Rom Subsystem - IBM 5170 Technical Reference

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Level
MicroProcessor NMI
Interrupt Controllers
CTLR 1
CTLR2
IRQ 0
IRQ 1
IRQ 2
IRQ 8
IRQ 9
IRQ 10
IRQ 11
IRQ 12
IRQ 13
IRQ 14
IRQ 15
IRQ 3
IRQ 4
IRQ 5
IRQ 6
IRQ 7
Function
Parity or I/O Channel Check
Timer Output 0
Keyboard (Output Buffer Full)
Interrupt from CTLR 2
Realtime Clock Interrupt
Software Redirected to INT
~AH
(IRQ 2)
Reserved
Reserved
Reserved
Coprocessor
Fixed Disk Controller
Reserved
Serial Port 2
Serial Port 1
Parallel Port 2
Diskette Controller
Parallel Port 1
ROM Subsystem
The system board's ROM subsystem consists of two 32K by 8-bit
ROM/EPROM modules or four 16K by 8-bit ROM/EPROM
modules in a 32K by 16-bit arrangement. The code for odd and
even addresses resides in separate modules. ROM is assigned at
the top of the first and last 1M address space (hex OFOOOO and
hex FFOOOO). ROM is not parity-checked. Its access time is 150
nanoseconds and its cycle time is 230 nanoseconds.
System
Board 1-11