IBM 5170 Technical Reference page 48

Read or Write command is active gated with the address decode
for the device. Memory Read and Write commands to an 8-bit
device are active on the falling edge of the system clock. 'OWS
I
is active low and should be driven with an open collector or
tri-state driver capable of sinking 20 rnA.
The following figure is an I/O address map.
Hex Range* Usage
000-01F
DMA controller 1. 8237A-5
020-03F Interrupt controller 1. 8259A, Master
02E1
GPIB (Adapter 0)
02E2 & 02E3
Data Acquisition (Adapter 0)
040-05F Timer 8254.2
060-06F 8042 (Keyboard)
06E2
&
06E3 Data Acquisition (Adapter 1)
070-07F Real-time clock. NMI (non-maskable interrupt) mask
080-09F
DMA page registers. 74LS612
OAO-OBF
Interrupt controller 2. 8259A
OAE2
&
OAE3 Data Acquisition (Adapter 2)
OCO-ODF DMA controller 2.8237A-5
OEE2 & OEE3 Data Acquisition (Adapter 3)
OFO Clear Math Coprocessor Busy
OF1 Reset Math Coprocessor
OF8-0FF
Math Coprocessor
1FO-1 FS Fixed Disk
200-207 Game I/O
22E1
GPIB (Adapter 1)
27S-27F
Parallel printer port 2
2BO-2DF Alternate Enhanced Graphics Adapter
2FS-27F
Serial port 2
Note: I/O addresses. hex 000 to OFF. are reserved for the system
board I/O. Hex 100 to 3FF are available on the I/O channel. The base
addresses for GPIB and Data Acquisition are shown.
I/O Address Map (Part 1 of 2)
1-28 System Board
August 24, 1984