Hardware Interface - IBM 5170 Technical Reference

Data Type Bits Significant Approximate Range (Decimal)
Digits
(Decimal)
Word Integer 16 4 -32,768:5
x
:5+32,767
Short Integer 32 9 -2
x
10 9 :5
x
:5+2
x
10 9
Long Integer 64
19 -9
x
10
18
:5
x
:5+9
x
10
18
Packed Decimal 80 18 -99... 99:5
x
:5+99 ... 99 (18 digits)
Short Real
*
32 6-7 8.43
x
10-
37
:5
x
:53.37
x
10
38
Long Real
*
64 15-16 4.19
x
10-
307
:5
x
:51.67
x
10
308
Temporary Real
80
19 3.4
x
10- 4932
< x <
1.2 x 104
932
Data Types
*
The Short and Long data types correspond to the single and
double precision data types.
Hardware Interface
The math coprocessor uses the same clock generator as the
microprocessor.
It
works at one-third the frequency of the system
microprocessor clock. The coprocessor is wired so that it
functions as an I/O device through I/O port addresses hex OOF8,
OOF A, and OOFe. The microprocessor sends OP codes and
operands through these I/O ports. The microprocessor also
receives and stores results through the same I/O ports. The
coprocessor's busy signal informs the microprocessor that it is
executing; the microprocessor's Wait instruction forces the
microprocessor to wait until the coprocessor is finished executing.
The coprocessor detects six different exception conditions that
can occur during instruction execution.
If
the appropriate
exception mask within the coprocessor is not set, the coprocessor
sets its error signal. This error signal generates a hardware
interrupt (interrupt 13) and causes the
I
BUSY
I
signal to the
coprocessor to be held in the busy state. The
I
BUSY
I
signal may
be cleared by an 8-bit I/O Write command to address hex FO
with DO through D7 equal to O.
The power-on-self test code in the system ROM enables
hardware interrupt 13 and sets up its vector to point to a routine
in ROM. The ROM routine clears the
I
BUSY
I
signal's latch and
2-4 Coprocessor