IBM 5170 Technical Reference page 178

BIOS.
t:;.;;------------------.-----------------­
020F
;----- CHECKPOINT 3
020F BO 03 MOV AL,03H
; <><><><><><><><><><><><>
0211 E6 80 OUT MFG_PORT,AL ;<><><>CHECKPOINT 3<><><>
0213 8C C8 MOV AX,CS SETUP 55 SEG REG
0215
8E DO
MOV
S5,AX
0217 8E 08 HOV DS,AX
SET UP DATA SEG TO POINT TO
ROM ADDRESS
ASSUME SS: CODE
0219 BB 0000 R MOV
BX, OFFSET BEG I N
SETUP START I NG ROS ADDR
021C BC 0000 E MOV SP,OFFSET Cl
SETUP RETURN ADDRESS
021F E9 0000 E JMP ROS_CHECKSUM
0222 Cl1 :
0222 74 01 Jl C11A
HALT SYSTEM I F ERROR
0224 F4 HLT
TEST .04
; 8253 CHECK TIMER 1 ALL BITS ON
; DESCR I PT
I
ON
SET T I MER COUNT
CHECK THAT TIMER 1 ALL BITS ON
;
------ ---.--_.--------------------
- -------:
ASSUME OS: DATA
0225
B8
---- R CllA: MOV AX,DATA
; SET DATA SEGMENT
0228 8E 08 MOV OS,AX
022A BO 04 MOV AL,04H
; <><><><><><><><><><><><><><><>
022C E6 80 OUT HFG_PORT, AL
; <;><><;><>CHECKPOI NT 4<;><><><;><>
; ----- 0 I SABLE DMA CONTROLLER
MOV AL,04 AL ALREADY '" 04H
022E E6 08
OUT
DMAoe,AL
o
I SABLE DMA CONTROLLER 1
0230 E6 DO OUT DMAle,AL o I SABLE DMA CONTROLLER 2
;----- VERIFY THAT TIMER' FUNCTIONS OK
0232 8B 16 0072 R MOV ox, RESET_FLAG SAVE RESET FLAG WH ILE REFRESH I S OFF
0236
BO 54 MOV AL,54H SEL TIMER 1,LSB,MODE 2
0238 E6 43 OUT TIMER+3,AL
023A EB 00 JMP SHORT $+2 WAIT STATE FOR 10
023C 8A C1 MOV AL,CL SET INITIAL TIMER CNT TO a
023E E6 41 OUT T I MER+l ,AL
0240 B7 05 MOV BH,05H
LOOP COUNT
0242 C12: TIMER' BITS ON
0242
BO 40
HOV AL,40H
LATCH TIMER-l COUNT
0244 EB 00 JMP SHORT $+2
10 DELAY
0246 E6 43 OUT T I MER+3, AL
0248 80 FB FF CMP BL,OFFH YES - SEE IF ALL BITS GO OFF
024B 74 DB JE C13 T I MER1_B ITS_OFF
0240 E4 41 IN AL, TIMER+l READ T I MER 1 COUNT
024F OA 08 OR BL,AL ALL BITS ON IN TIMER
0251 E2 EF LOOP C12
TIMER1_BITS_ON
0253 FE CF DEC BH
0255
75 EB
JNZ C12
TRY AGAIN
0257 F4 HLT
TIMER 1 FAILURE, HALT SYS
TIMERT_BITS_OFF
;
------
-
-----------------------
- _.
-
-----
---
--
- - --
-----
-.­
TEST, 05
; 8253 CHECK TIMER 1 ALL BIT OFF
; OESCR I PT I ON
SET TIMER COUNT
CII[CK THAT T I MER , ALL BITS OFF
;
--
_.
-----
-
----
-- -
-
-_.-
-----------
--------
--
------------­
;------ CHECKPOINT 5
0258 BO 05 C13: HOV AL, 05~1
<><><><><;><><><><><><><>
025A E6 80
OUT
MFG_PORT, AL <><;><>CHECKPO I NT 5<><><>
025C
8A C3
HOV AL,BL SET TIMER 1 CNT
025£ 28 C9 SUB CX,CX
0260 E6 41 OUT TlMER+l,AL
0262 B7 05 MOV BH,05H SET TRY AGA I N COUNT
026'-1- C14: T I MER LOOP
0264
fB 00 JMP SHORT $+2 10 DELAY
0266
BO
110
MOV AL,40H LATCH TIMER 1 COUNT
0268 E6 43
OUT TIMER+3,AL
026A
EB 00 JMP SHORT $+2 DELAY FOR TIMER
026C
£B 00
JMP SHORT $+2 ADDED DELAY FOR TIMER
026£
Ell 41
IN AL,TlMER+l READ T I MER 1 COUNT
0270
22 DB
AND BL,AL
0272 74 07 JZ C15 WRAP DMA REG
0274 E2 EE LOOP C14 TIMER_LOOP
0276 FE CF DEC BH
0278
75 EA JNZ C14
027A
F4
HLT ; HALT SYSTEM
;
-
----------------
---------------
-----------
------
--
----­
TEST. 06
8237 DMA 0 INITIALIZATION CHANNEL REGISTER TEST
OEseR I PT I ON
DISABLE THE 8237 DMA CONTROLLER.
WR I TEtREAD THE CURRENT
ADDRESS AND WORD COUNT REGISTERS FOR ALL
CHANNELS.
;
--
-
---------
-
-
- -
-----
------------
----­
;----- CHECKPOINT 6
027B C15:
027B B8 ---- R MOY AX, DATA ; SET DATA SEGMENT
027E 8E 08 MOV as, AX
0280 BO 06
MOV AL,06H ; <:><><><><><><><><><><><;>
0282 E6 80 OUT MFG_PORT, AL ; <><><>CHECKPO I NT 6<;><><::>
0284 89 16 0072 R
MOV RESET_FLAG,oX ; RESTORE SOFT RESET FLAG
0288 E6 00
OUT DMA+ODH, AL ; SEND MASTER CLEAR TO DMA
;----- WRAP DMA 0 CHANNEL ADDRESS AND COUNT REGISTERS
028A BO FF MOV AL,OFFH WRITE PATTERN FF TO ALL REGS
028C SA 08 C16:
MOV BL,AL
SAVE PATTERN FOR COMPARE
028E 8A Fa MOV BH,AL
0290 B9 0008 HOV ex.. 8 SETUP LOOP CNT
0293 BA 0000 MOV OX,OMA SETUP I/O PORT AD DR OF REG
0296 EE C17:
OUT
DX,AL WR I TE PATTERN TO REG, LS8
0297 EB 00 JMP
SHORT $+2
WAI T STATE FOR
10
0299 ££ OUT
OX,AL
MSB OF 16 BIT REG
029A BO 01 MOV AL,OlH AL TO A~OTHER PAT BEFORE RD
029C EB 00
JMP
SHORT $+2 WAIT STATE FOR
10
029E EC IN AL, OX READ 16-BIT DMA CH REG,
LSS
2ST DMA
029F EB 00
JHP SHORT $+2 WAIT STATE fOR
10
02Al SA EO MOY
AH,AL SAVE LSB OF 16-81T REG
02A3 [C
IN AL,DX READ MSB Of DMA CH REG
5-36 Test 1