Figure 7-3: 1000Base-X Connection To Virtex-5 Gtp Transceivers - Xilinx LogiCORE 1000BASE-X User Manual

R
84
userclk2 (125MHz)
component_name_block
(Block Level from
example design)
Ethernet 1000BASE-X
PCS/PMA or SGMII
LogiCORE
userclk
userclk2
rxchariscomma
rxbufstatus[1:0]
rxcharisk
rxdisperr
rxdata[7:0]
rxrundisp
rxclkcorcnt[2:0]
powerdown
txchardispmode
txchardispval
txcharisk
txdata[7:0]
enablealign

Figure 7-3: 1000BASE-X Connection to Virtex-5 GTP Transceivers

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Chapter 7: 1000BASE-X with RocketIO Transceivers
brefclkp
IPAD
IPAD
BUFG
brefclkn
rocketio_wrapper_gtp
rocketio_wrapper_gtp_tile
REFCLKOUT
TXUSRCLK0
TXUSRCLK20
RXUSRCLK0
RXUSRCLK20
RXCHARISCOMMA0
RXBUFERR0
RXCHARISK0
LOGIC
RXDISPERR0
SHIM
RXDATA[07:0]
RXRUNDISP0
RXCLKCORCNT[2:0]
POWERDOWN0
TXCHARDISPMODE0
TXCHARDISPVAL0
TXCHARISK0
TXDATA[07:0]
RXENMCOMMAALIGN0
RXENPCOMMAALIGN0
Ethernet 1000BASE-X PCS/PMA or SGMII v9.1
IBUFGDS
clkin
(125MHz)
Virtex-5
GTP
RocketIO
(0)
CLKIN
UG155 March 24, 2008