Gmii Reception - Xilinx LogiCORE 1000BASE-X User Manual

Logicore ip ethernet 1000base-x pcs/pma or sgmii v9.1
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R
Error Propagation
A corrupted frame transfer is illustrated in
frame by asserting gmii_tx_er at any point during the gmii_tx_en assertion window.
The core ensures that all errors are propagated through both transmit and receive paths so
that the error is eventually detected by the link partner.

GMII Reception

This section includes figures that illustrate GMII reception. In these figures the clock is not
labelled. The source of this clock signal will vary, depending on the options used when the
core is generated. For more information on clocking, see Chapters 6, 7 and 8.
Normal Frame Reception
The timing of normal inbound frame transfer is illustrated in
Ethernet frame reception is proceeded by a preamble field. The IEEE 802.3 specification
(see clause 35) allows for up to all of the seven preamble bytes that proceed the Start of
Frame Delimiter (SFD) to be lost in the network. The SFD will always be present in well-
formed frames.
54
gmii_txd[7:0]
preamble
gmii_tx_en
gmii_tx_er
Figure 5-2: GMII Error Propagation Within a Frame
gmii_rxd[7:0]
preamble
gmii_rx_dv
gmii_rx_er
Figure 5-3: GMII Normal Frame Reception
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Chapter 5: Using the Client-side GMII Data Path
Figure
5-2. An error may be injected into the
Figure
Ethernet 1000BASE-X PCS/PMA or SGMII v9.1
FCS
5-3. This shows that
FCS
UG155 March 24, 2008

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