Tbi Rx Elastic Buffer - Xilinx LogiCORE 1000BASE-X User Manual

Rx Elastic Buffers: Depths and Maximum Frame Sizes
Table E-2: Maximum Frame Sizes: Fabric Rx Elastic Buffers
(100ppm Clock Tolerance)

TBI Rx Elastic Buffer

For SGMII / Dynamic Switching
The Rx Elastic Buffer used for the SGMII or Dynamic Standards Switching is identical to
the method use in
For 1000BASE-X
Figure E-3
Interface with the 1000BASE-X standard. This buffer is intentionally smaller than the
equivalent buffer for SGMII/Dynamic Switching; because a larger size is not required, the
buffer is kept smaller to save logic and keep latency low. Each FIFO word corresponds to a
single character of data (equivalent to a single byte of data following 8B10B decoding).
The shaded area of
frame reception.
•
•
Ethernet 1000BASE-X PCS/PMA or SGMII v9.1
UG155 March 24, 2008
Standard / Speed
1000BASE-X (1 Gbps only)
SGMII (1 Gbps)
SGMII (100 Mbps)
SGMII (10 Mbps)
"SGMII Fabric Rx Elastic Buffer."
illustrates the Rx Elastic Buffer depth and thresholds when using the Ten-Bit-
Figure E-3: TBI Elastic Buffer Size for All Families
Figure E-3
If the buffer is filling during frame reception, then there are 30-18 = 12 FIFO locations
available before the buffer reaches the overflow mark.
If the buffer is emptying during reception, then there are 14-2 = 12 FIFO locations
available before the buffer reaches the underflow mark.
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Maximum Frame Size
280000
280000
28000
2800
TBI
Rx Elastic Buffer
30 - Overflow Mark
18
32
14
2 - Underflow Mark
represents the usable buffer availability for the duration of
R
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