Unit Identification; Malfunction Isolation; Repair; Repair Verification - IBM 2025 Maintenance Manual

Processing unit
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1.16.2 UNIT IDENTIFICATION
Standard SLT nomenclature aFplies tc the
2025 CPU.
1.16. 3 MALFUNCTION ISOLATION
The aim of the Model 25 Diagnostic Program
Package CDPP) is to achieve a minimum DUI
by high-resolution fault locaticn -0f an
easily replaceatle component.
The package
provides effective malfunction isolation to
the two general types of exposure:
A..
Logic - malfunction in the basic CPU,
integrated I/O attachments, channel.,
and CPU features.
Resolution capabilities within the
integrated devices are as follows.
254
0
1.
2.
3.
4.
Chn1
1.
2.
3.
4.
140 3
1.
2.
3.
4.
5.
6.
1052
1.
2.
Hole-count test, read and
pinch ( trush failures),
Manual operations, including
card transport
paths~
Stacker select,
PFR.
Check Sel-out wraparound to
Sel-in.
Test address response,
Test I/O; complete initial
selection of all pcssible
device addresses, section
1.19.7).
Single-cycle routine; corrunand
to a particular address and
loop.
Print coi 1 checking
Drum pulse response
Hydraulic speed
Carriage brushes/erritter/
mechanics
Hammer fire,
Frint quality.
Manual intervention section:
Function of all keys,
End-of-forms contact,
capability of repeatedly
printing any key.
Dynamic section:
Atility to print characters
for all tilt/rotate
comtinations,
End-of- forms contact.
B.
2311 -
Resolution is provided by
macrodiagnostics .•
Hard Core -
for malfunctions that would
prevent basic CPU functions necessary
for execution of resident diagnostics,
the following strategy will be used.
1.
Power, clock, etc.
Normal CE repair Frocedures will be
applied using console capabilities,
power diagnostic techniques diagram
in the maintenance diagram manual,
etc.
2.
Memory
A memory diagnostic techniques
diagram for diagncsis and repair is
provided in the maintenance diagram
manual.
'Ihe caFabilities designed
into the Model 25 such as SCAN
STOR, TEST PATTERN, etc.
are used
in this strategy.
A nonresident memory
microdiagnostic is also provided
for CPU with two memory modules.
The recorrunended sequence for executing
the DPP as outlined in the Maintenance
Diagrams Manual provides for a building
block approach to locating the failure.
Each program basically builds on the
successful execution of the previous lower
level prograro.
1.16 .4 REPAIR
Repair will generally ccnsist of replacing
the failing component (usually an SLT card)
from
on
site or branch office stock.
1.16.5 REPAIR VERIFICATION
The micro- or macro-program where the
failure was diagnosed should be reexecuted
after the repair.
successful execution
will be considered a justification for
returning to the custorrer problem-program.
1.16. 6 INI'ERMITTENI' MALFUNCTION
Intermittent failures as seen by the
customer can take one of two forms:
1.
The failure is actually a solid
hardware defect, but appears
interrei ttent because that area of the
logic is called on only to function
occasionally.
Microdiagnostic programs will be
effective to a high degree on this type
of failure because by design, they are
capable of checking the majority of CPU
and integrated I/O attachment logic.
2.
The failure is intermittent due to a
degraded or marginal component.
The looping capabilities designed
into the micrcdiagncstic programs will
2025 FEMM (7/69)
1-113

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